Merge pull request #3158 from diondokter/stm-dualcore

Stm dualcore better init

Author: lulf

ci.sh

@@ -179,7 +179,7 @@ cargo batch \
     --- build --release --manifest-path embassy-boot-nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns \
     --- build --release --manifest-path embassy-boot-nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9120-ns \
     --- build --release --manifest-path embassy-boot-rp/Cargo.toml --target thumbv6m-none-eabi \
-    --- build --release --manifest-path embassy-boot-stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4 \
+    --- build --release --manifest-path embassy-boot-stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32l496zg \
     --- build --release --manifest-path docs/examples/basic/Cargo.toml --target thumbv7em-none-eabi \
     --- build --release --manifest-path docs/examples/layer-by-layer/blinky-pac/Cargo.toml --target thumbv7em-none-eabi \
     --- build --release --manifest-path docs/examples/layer-by-layer/blinky-hal/Cargo.toml --target thumbv7em-none-eabi \
@@ -207,6 +207,8 @@ cargo batch \
     --- build --release --manifest-path examples/stm32h5/Cargo.toml --target thumbv8m.main-none-eabihf --out-dir out/examples/stm32h5 \
     --- build --release --manifest-path examples/stm32h7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7 \
     --- build --release --manifest-path examples/stm32h735/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h735 \
+    --- build --release --manifest-path examples/stm32h755cm4/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h755cm4 \
+    --- build --release --manifest-path examples/stm32h755cm7/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h755cm7 \
     --- build --release --manifest-path examples/stm32h7rs/Cargo.toml --target thumbv7em-none-eabi --out-dir out/examples/stm32h7rs \
     --- build --release --manifest-path examples/stm32l0/Cargo.toml --target thumbv6m-none-eabi --out-dir out/examples/stm32l0 \
     --- build --release --manifest-path examples/stm32l1/Cargo.toml --target thumbv7m-none-eabi --out-dir out/examples/stm32l1 \
@@ -233,9 +235,9 @@ cargo batch \
     --- build --release --manifest-path examples/boot/bootloader/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9160-ns \
     --- build --release --manifest-path examples/boot/bootloader/nrf/Cargo.toml --target thumbv8m.main-none-eabihf --features embassy-nrf/nrf9120-ns \
     --- build --release --manifest-path examples/boot/bootloader/rp/Cargo.toml --target thumbv6m-none-eabi \
-    --- build --release --manifest-path examples/boot/bootloader/stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wl55jc-cm4 \
+    --- build --release --manifest-path examples/boot/bootloader/stm32/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32l496zg \
     --- build --release --manifest-path examples/boot/bootloader/stm32wb-dfu/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32wb55rg \
-    --- build --release --manifest-path examples/boot/bootloader/stm32-dual-bank/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32h747xi-cm7 \
+    --- build --release --manifest-path examples/boot/bootloader/stm32-dual-bank/Cargo.toml --target thumbv7em-none-eabi --features embassy-stm32/stm32h743zi \
     --- build --release --manifest-path examples/wasm/Cargo.toml --target wasm32-unknown-unknown --out-dir out/examples/wasm \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f103c8 --out-dir out/tests/stm32f103c8 \
     --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32f429zi --out-dir out/tests/stm32f429zi \

embassy-stm32/Cargo.toml

@@ -80,7 +80,7 @@ stm32-fmc = "0.3.0"
 cfg-if = "1.0.0"
 embedded-io = { version = "0.6.0" }
 embedded-io-async = { version = "0.6.1" }
-chrono = { version = "^0.4", default-features = false, optional = true}
+chrono = { version = "^0.4", default-features = false, optional = true }
 bit_field = "0.10.2"
 document-features = "0.2.7"
 
@@ -181,6 +181,9 @@ split-pc3 = ["_split-pins-enabled"]
 ## internal use only
 _split-pins-enabled = []
 
+## internal use only
+_dual-core = []
+
 #! ## Chip-selection features
 #! Select your chip by specifying the model as a feature, e.g. `stm32c011d6`.
 #! Check the `Cargo.toml` for the latest list of supported chips.
@@ -1004,40 +1007,40 @@ stm32h743xg = [ "stm32-metapac/stm32h743xg" ]
 stm32h743xi = [ "stm32-metapac/stm32h743xi" ]
 stm32h743zg = [ "stm32-metapac/stm32h743zg" ]
 stm32h743zi = [ "stm32-metapac/stm32h743zi" ]
-stm32h745bg-cm7 = [ "stm32-metapac/stm32h745bg-cm7" ]
-stm32h745bg-cm4 = [ "stm32-metapac/stm32h745bg-cm4" ]
-stm32h745bi-cm7 = [ "stm32-metapac/stm32h745bi-cm7" ]
-stm32h745bi-cm4 = [ "stm32-metapac/stm32h745bi-cm4" ]
-stm32h745ig-cm7 = [ "stm32-metapac/stm32h745ig-cm7" ]
-stm32h745ig-cm4 = [ "stm32-metapac/stm32h745ig-cm4" ]
-stm32h745ii-cm7 = [ "stm32-metapac/stm32h745ii-cm7" ]
-stm32h745ii-cm4 = [ "stm32-metapac/stm32h745ii-cm4" ]
-stm32h745xg-cm7 = [ "stm32-metapac/stm32h745xg-cm7" ]
-stm32h745xg-cm4 = [ "stm32-metapac/stm32h745xg-cm4" ]
-stm32h745xi-cm7 = [ "stm32-metapac/stm32h745xi-cm7" ]
-stm32h745xi-cm4 = [ "stm32-metapac/stm32h745xi-cm4" ]
-stm32h745zg-cm7 = [ "stm32-metapac/stm32h745zg-cm7" ]
-stm32h745zg-cm4 = [ "stm32-metapac/stm32h745zg-cm4" ]
-stm32h745zi-cm7 = [ "stm32-metapac/stm32h745zi-cm7" ]
-stm32h745zi-cm4 = [ "stm32-metapac/stm32h745zi-cm4" ]
-stm32h747ag-cm7 = [ "stm32-metapac/stm32h747ag-cm7" ]
-stm32h747ag-cm4 = [ "stm32-metapac/stm32h747ag-cm4" ]
-stm32h747ai-cm7 = [ "stm32-metapac/stm32h747ai-cm7" ]
-stm32h747ai-cm4 = [ "stm32-metapac/stm32h747ai-cm4" ]
-stm32h747bg-cm7 = [ "stm32-metapac/stm32h747bg-cm7" ]
-stm32h747bg-cm4 = [ "stm32-metapac/stm32h747bg-cm4" ]
-stm32h747bi-cm7 = [ "stm32-metapac/stm32h747bi-cm7" ]
-stm32h747bi-cm4 = [ "stm32-metapac/stm32h747bi-cm4" ]
-stm32h747ig-cm7 = [ "stm32-metapac/stm32h747ig-cm7" ]
-stm32h747ig-cm4 = [ "stm32-metapac/stm32h747ig-cm4" ]
-stm32h747ii-cm7 = [ "stm32-metapac/stm32h747ii-cm7" ]
-stm32h747ii-cm4 = [ "stm32-metapac/stm32h747ii-cm4" ]
-stm32h747xg-cm7 = [ "stm32-metapac/stm32h747xg-cm7" ]
-stm32h747xg-cm4 = [ "stm32-metapac/stm32h747xg-cm4" ]
-stm32h747xi-cm7 = [ "stm32-metapac/stm32h747xi-cm7" ]
-stm32h747xi-cm4 = [ "stm32-metapac/stm32h747xi-cm4" ]
-stm32h747zi-cm7 = [ "stm32-metapac/stm32h747zi-cm7" ]
-stm32h747zi-cm4 = [ "stm32-metapac/stm32h747zi-cm4" ]
+stm32h745bg-cm7 = [ "stm32-metapac/stm32h745bg-cm7", "_dual-core" ]
+stm32h745bg-cm4 = [ "stm32-metapac/stm32h745bg-cm4", "_dual-core" ]
+stm32h745bi-cm7 = [ "stm32-metapac/stm32h745bi-cm7", "_dual-core" ]
+stm32h745bi-cm4 = [ "stm32-metapac/stm32h745bi-cm4", "_dual-core" ]
+stm32h745ig-cm7 = [ "stm32-metapac/stm32h745ig-cm7", "_dual-core" ]
+stm32h745ig-cm4 = [ "stm32-metapac/stm32h745ig-cm4", "_dual-core" ]
+stm32h745ii-cm7 = [ "stm32-metapac/stm32h745ii-cm7", "_dual-core" ]
+stm32h745ii-cm4 = [ "stm32-metapac/stm32h745ii-cm4", "_dual-core" ]
+stm32h745xg-cm7 = [ "stm32-metapac/stm32h745xg-cm7", "_dual-core" ]
+stm32h745xg-cm4 = [ "stm32-metapac/stm32h745xg-cm4", "_dual-core" ]
+stm32h745xi-cm7 = [ "stm32-metapac/stm32h745xi-cm7", "_dual-core" ]
+stm32h745xi-cm4 = [ "stm32-metapac/stm32h745xi-cm4", "_dual-core" ]
+stm32h745zg-cm7 = [ "stm32-metapac/stm32h745zg-cm7", "_dual-core" ]
+stm32h745zg-cm4 = [ "stm32-metapac/stm32h745zg-cm4", "_dual-core" ]
+stm32h745zi-cm7 = [ "stm32-metapac/stm32h745zi-cm7", "_dual-core" ]
+stm32h745zi-cm4 = [ "stm32-metapac/stm32h745zi-cm4", "_dual-core" ]
+stm32h747ag-cm7 = [ "stm32-metapac/stm32h747ag-cm7", "_dual-core" ]
+stm32h747ag-cm4 = [ "stm32-metapac/stm32h747ag-cm4", "_dual-core" ]
+stm32h747ai-cm7 = [ "stm32-metapac/stm32h747ai-cm7", "_dual-core" ]
+stm32h747ai-cm4 = [ "stm32-metapac/stm32h747ai-cm4", "_dual-core" ]
+stm32h747bg-cm7 = [ "stm32-metapac/stm32h747bg-cm7", "_dual-core" ]
+stm32h747bg-cm4 = [ "stm32-metapac/stm32h747bg-cm4", "_dual-core" ]
+stm32h747bi-cm7 = [ "stm32-metapac/stm32h747bi-cm7", "_dual-core" ]
+stm32h747bi-cm4 = [ "stm32-metapac/stm32h747bi-cm4", "_dual-core" ]
+stm32h747ig-cm7 = [ "stm32-metapac/stm32h747ig-cm7", "_dual-core" ]
+stm32h747ig-cm4 = [ "stm32-metapac/stm32h747ig-cm4", "_dual-core" ]
+stm32h747ii-cm7 = [ "stm32-metapac/stm32h747ii-cm7", "_dual-core" ]
+stm32h747ii-cm4 = [ "stm32-metapac/stm32h747ii-cm4", "_dual-core" ]
+stm32h747xg-cm7 = [ "stm32-metapac/stm32h747xg-cm7", "_dual-core" ]
+stm32h747xg-cm4 = [ "stm32-metapac/stm32h747xg-cm4", "_dual-core" ]
+stm32h747xi-cm7 = [ "stm32-metapac/stm32h747xi-cm7", "_dual-core" ]
+stm32h747xi-cm4 = [ "stm32-metapac/stm32h747xi-cm4", "_dual-core" ]
+stm32h747zi-cm7 = [ "stm32-metapac/stm32h747zi-cm7", "_dual-core" ]
+stm32h747zi-cm4 = [ "stm32-metapac/stm32h747zi-cm4", "_dual-core" ]
 stm32h750ib = [ "stm32-metapac/stm32h750ib" ]
 stm32h750vb = [ "stm32-metapac/stm32h750vb" ]
 stm32h750xb = [ "stm32-metapac/stm32h750xb" ]
@@ -1048,24 +1051,24 @@ stm32h753ii = [ "stm32-metapac/stm32h753ii" ]
 stm32h753vi = [ "stm32-metapac/stm32h753vi" ]
 stm32h753xi = [ "stm32-metapac/stm32h753xi" ]
 stm32h753zi = [ "stm32-metapac/stm32h753zi" ]
-stm32h755bi-cm7 = [ "stm32-metapac/stm32h755bi-cm7" ]
-stm32h755bi-cm4 = [ "stm32-metapac/stm32h755bi-cm4" ]
-stm32h755ii-cm7 = [ "stm32-metapac/stm32h755ii-cm7" ]
-stm32h755ii-cm4 = [ "stm32-metapac/stm32h755ii-cm4" ]
-stm32h755xi-cm7 = [ "stm32-metapac/stm32h755xi-cm7" ]
-stm32h755xi-cm4 = [ "stm32-metapac/stm32h755xi-cm4" ]
-stm32h755zi-cm7 = [ "stm32-metapac/stm32h755zi-cm7" ]
-stm32h755zi-cm4 = [ "stm32-metapac/stm32h755zi-cm4" ]
-stm32h757ai-cm7 = [ "stm32-metapac/stm32h757ai-cm7" ]
-stm32h757ai-cm4 = [ "stm32-metapac/stm32h757ai-cm4" ]
-stm32h757bi-cm7 = [ "stm32-metapac/stm32h757bi-cm7" ]
-stm32h757bi-cm4 = [ "stm32-metapac/stm32h757bi-cm4" ]
-stm32h757ii-cm7 = [ "stm32-metapac/stm32h757ii-cm7" ]
-stm32h757ii-cm4 = [ "stm32-metapac/stm32h757ii-cm4" ]
-stm32h757xi-cm7 = [ "stm32-metapac/stm32h757xi-cm7" ]
-stm32h757xi-cm4 = [ "stm32-metapac/stm32h757xi-cm4" ]
-stm32h757zi-cm7 = [ "stm32-metapac/stm32h757zi-cm7" ]
-stm32h757zi-cm4 = [ "stm32-metapac/stm32h757zi-cm4" ]
+stm32h755bi-cm7 = [ "stm32-metapac/stm32h755bi-cm7", "_dual-core" ]
+stm32h755bi-cm4 = [ "stm32-metapac/stm32h755bi-cm4", "_dual-core" ]
+stm32h755ii-cm7 = [ "stm32-metapac/stm32h755ii-cm7", "_dual-core" ]
+stm32h755ii-cm4 = [ "stm32-metapac/stm32h755ii-cm4", "_dual-core" ]
+stm32h755xi-cm7 = [ "stm32-metapac/stm32h755xi-cm7", "_dual-core" ]
+stm32h755xi-cm4 = [ "stm32-metapac/stm32h755xi-cm4", "_dual-core" ]
+stm32h755zi-cm7 = [ "stm32-metapac/stm32h755zi-cm7", "_dual-core" ]
+stm32h755zi-cm4 = [ "stm32-metapac/stm32h755zi-cm4", "_dual-core" ]
+stm32h757ai-cm7 = [ "stm32-metapac/stm32h757ai-cm7", "_dual-core" ]
+stm32h757ai-cm4 = [ "stm32-metapac/stm32h757ai-cm4", "_dual-core" ]
+stm32h757bi-cm7 = [ "stm32-metapac/stm32h757bi-cm7", "_dual-core" ]
+stm32h757bi-cm4 = [ "stm32-metapac/stm32h757bi-cm4", "_dual-core" ]
+stm32h757ii-cm7 = [ "stm32-metapac/stm32h757ii-cm7", "_dual-core" ]
+stm32h757ii-cm4 = [ "stm32-metapac/stm32h757ii-cm4", "_dual-core" ]
+stm32h757xi-cm7 = [ "stm32-metapac/stm32h757xi-cm7", "_dual-core" ]
+stm32h757xi-cm4 = [ "stm32-metapac/stm32h757xi-cm4", "_dual-core" ]
+stm32h757zi-cm7 = [ "stm32-metapac/stm32h757zi-cm7", "_dual-core" ]
+stm32h757zi-cm4 = [ "stm32-metapac/stm32h757zi-cm4", "_dual-core" ]
 stm32h7a3ag = [ "stm32-metapac/stm32h7a3ag" ]
 stm32h7a3ai = [ "stm32-metapac/stm32h7a3ai" ]
 stm32h7a3ig = [ "stm32-metapac/stm32h7a3ig" ]
@@ -1598,14 +1601,14 @@ stm32wba55he = [ "stm32-metapac/stm32wba55he" ]
 stm32wba55hg = [ "stm32-metapac/stm32wba55hg" ]
 stm32wba55ue = [ "stm32-metapac/stm32wba55ue" ]
 stm32wba55ug = [ "stm32-metapac/stm32wba55ug" ]
-stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4" ]
-stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p" ]
-stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4" ]
-stm32wl54jc-cm0p = [ "stm32-metapac/stm32wl54jc-cm0p" ]
-stm32wl55cc-cm4 = [ "stm32-metapac/stm32wl55cc-cm4" ]
-stm32wl55cc-cm0p = [ "stm32-metapac/stm32wl55cc-cm0p" ]
-stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4" ]
-stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p" ]
+stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4", "_dual-core" ]
+stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p", "_dual-core" ]
+stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4", "_dual-core" ]
+stm32wl54jc-cm0p = [ "stm32-metapac/stm32wl54jc-cm0p", "_dual-core" ]
+stm32wl55cc-cm4 = [ "stm32-metapac/stm32wl55cc-cm4", "_dual-core" ]
+stm32wl55cc-cm0p = [ "stm32-metapac/stm32wl55cc-cm0p", "_dual-core" ]
+stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4", "_dual-core" ]
+stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p", "_dual-core" ]
 stm32wle4c8 = [ "stm32-metapac/stm32wle4c8" ]
 stm32wle4cb = [ "stm32-metapac/stm32wle4cb" ]
 stm32wle4cc = [ "stm32-metapac/stm32wle4cc" ]

embassy-stm32/build.rs

@@ -480,7 +480,7 @@ fn main() {
             self.clock_names.insert(name.to_ascii_lowercase());
             quote!(unsafe {
                 unwrap!(
-                    crate::rcc::get_freqs().#clock_name,
+                    crate::rcc::get_freqs().#clock_name.to_hertz(),
                     "peripheral '{}' is configured to use the '{}' clock, which is not running. \
                     Either enable it in 'config.rcc' or change 'config.rcc.mux' to use another clock",
                     #peripheral,
@@ -713,9 +713,10 @@ fn main() {
     g.extend(quote! {
         #[derive(Clone, Copy, Debug)]
         #[cfg_attr(feature = "defmt", derive(defmt::Format))]
+        #[repr(C)]
         pub struct Clocks {
             #(
-                pub #clock_idents: Option<crate::time::Hertz>,
+                pub #clock_idents: crate::time::MaybeHertz,
             )*
         }
     });
@@ -732,7 +733,7 @@ fn main() {
                         $($(#[$m])* $k: $v,)*
                     };
                     crate::rcc::set_freqs(crate::rcc::Clocks {
-                        #( #clock_idents: all.#clock_idents, )*
+                        #( #clock_idents: all.#clock_idents.into(), )*
                     });
                 }
             };

embassy-stm32/src/adc/mod.rs

@@ -78,7 +78,7 @@ pub(crate) fn blocking_delay_us(us: u32) {
     embassy_time::block_for(embassy_time::Duration::from_micros(us as u64));
     #[cfg(not(feature = "time"))]
     {
-        let freq = unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 as u64;
+        let freq = unsafe { crate::rcc::get_freqs() }.sys.to_hertz().unwrap().0 as u64;
         let us = us as u64;
         let cycles = freq * us / 1_000_000;
         cortex_m::asm::delay(cycles as u32);

embassy-stm32/src/dsihost.rs

@@ -14,7 +14,7 @@ pub fn blocking_delay_ms(ms: u32) {
     #[cfg(feature = "time")]
     embassy_time::block_for(embassy_time::Duration::from_millis(ms as u64));
     #[cfg(not(feature = "time"))]
-    cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1_000 * ms);
+    cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.to_hertz().unwrap().0 / 1_000 * ms);
 }
 
 /// PacketTypes extracted from CubeMX

embassy-stm32/src/lib.rs

@@ -273,7 +273,120 @@ impl Default for Config {
 /// This returns the peripheral singletons that can be used for creating drivers.
 ///
 /// This should only be called once at startup, otherwise it panics.
+#[cfg(not(feature = "_dual-core"))]
 pub fn init(config: Config) -> Peripherals {
+    init_hw(config)
+}
+
+#[cfg(feature = "_dual-core")]
+mod dual_core {
+    use core::cell::UnsafeCell;
+    use core::mem::MaybeUninit;
+    use core::sync::atomic::{AtomicUsize, Ordering};
+
+    use rcc::Clocks;
+
+    use super::*;
+
+    /// Object containing data that embassy needs to share between cores.
+    ///
+    /// It cannot be initialized by the user. The intended use is:
+    ///
+    /// ```
+    /// #[link_section = ".ram_d3"]
+    /// static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit();
+    ///
+    /// init_secondary(&SHARED_DATA);
+    /// ```
+    ///
+    /// This static must be placed in the same position for both cores. How and where this is done is left to the user.
+    pub struct SharedData {
+        init_flag: AtomicUsize,
+        clocks: UnsafeCell<MaybeUninit<Clocks>>,
+    }
+
+    unsafe impl Sync for SharedData {}
+
+    const INIT_DONE_FLAG: usize = 0xca11ab1e;
+
+    /// Initialize the `embassy-stm32` HAL with the provided configuration.
+    /// This function does the actual initialization of the hardware, in contrast to [init_secondary] or [try_init_secondary].
+    /// Any core can do the init, but it's important only one core does it.
+    ///
+    /// This returns the peripheral singletons that can be used for creating drivers.
+    ///
+    /// This should only be called once at startup, otherwise it panics.
+    ///
+    /// The `shared_data` is used to coordinate the init with the second core. Read the [SharedData] docs
+    /// for more information on its requirements.
+    pub fn init_primary(config: Config, shared_data: &'static MaybeUninit<SharedData>) -> Peripherals {
+        let shared_data = unsafe { shared_data.assume_init_ref() };
+
+        rcc::set_freqs_ptr(shared_data.clocks.get());
+        let p = init_hw(config);
+
+        shared_data.init_flag.store(INIT_DONE_FLAG, Ordering::SeqCst);
+
+        p
+    }
+
+    /// Try to initialize the `embassy-stm32` HAL based on the init done by the other core using [init_primary].
+    ///
+    /// This returns the peripheral singletons that can be used for creating drivers if the other core is done with its init.
+    /// If the other core is not done yet, this will return `None`.
+    ///
+    /// This should only be called once at startup, otherwise it may panic.
+    ///
+    /// The `shared_data` is used to coordinate the init with the second core. Read the [SharedData] docs
+    /// for more information on its requirements.
+    pub fn try_init_secondary(shared_data: &'static MaybeUninit<SharedData>) -> Option<Peripherals> {
+        let shared_data = unsafe { shared_data.assume_init_ref() };
+
+        if shared_data.init_flag.load(Ordering::SeqCst) != INIT_DONE_FLAG {
+            return None;
+        }
+
+        // Separate load and store to support the CM0 of the STM32WL
+        shared_data.init_flag.store(0, Ordering::SeqCst);
+
+        Some(init_secondary_hw(shared_data))
+    }
+
+    /// Initialize the `embassy-stm32` HAL based on the init done by the other core using [init_primary].
+    ///
+    /// This returns the peripheral singletons that can be used for creating drivers when the other core is done with its init.
+    /// If the other core is not done yet, this will spinloop wait on it.
+    ///
+    /// This should only be called once at startup, otherwise it may panic.
+    ///
+    /// The `shared_data` is used to coordinate the init with the second core. Read the [SharedData] docs
+    /// for more information on its requirements.
+    pub fn init_secondary(shared_data: &'static MaybeUninit<SharedData>) -> Peripherals {
+        loop {
+            if let Some(p) = try_init_secondary(shared_data) {
+                return p;
+            }
+        }
+    }
+
+    fn init_secondary_hw(shared_data: &'static SharedData) -> Peripherals {
+        rcc::set_freqs_ptr(shared_data.clocks.get());
+
+        // We use different timers on the different cores, so we have to still initialize one here
+        #[cfg(feature = "_time-driver")]
+        critical_section::with(|cs| {
+            // must be after rcc init
+            time_driver::init(cs);
+        });
+
+        Peripherals::take()
+    }
+}
+
+#[cfg(feature = "_dual-core")]
+pub use dual_core::*;
+
+fn init_hw(config: Config) -> Peripherals {
     critical_section::with(|cs| {
         let p = Peripherals::take_with_cs(cs);