wip

Author: xoviat

embassy-stm32/src/timer/low_level.rs

@@ -303,6 +303,7 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
     pub fn bits(&self) -> TimerBits {
         match T::Word::bits() {
             16 => TimerBits::Bits16,
+            #[cfg(not(stm32l0))]
             32 => TimerBits::Bits32,
             _ => unreachable!(),
         }

embassy-stm32/src/timer/mod.rs

@@ -177,6 +177,21 @@ pub trait CoreInstance: SealedInstance + 'static {
     /// This is a raw pointer to the register block. The actual register block layout varies depending on the timer type.
     fn regs() -> *mut ();
 }
+
+#[cfg(stm32l0)]
+impl From<crate::pac::timer::regs::Ccr1ch> for u32 {
+    fn from(value: crate::pac::timer::regs::Ccr1ch) -> Self {
+        value.ccr().into()
+    }
+}
+
+#[cfg(stm32l0)]
+impl From<u32> for crate::pac::timer::regs::ArrCore {
+    fn from(value: u32) -> Self {
+        crate::pac::timer::regs::ArrCore(value)
+    }
+}
+
 /// Cut-down basic timer instance.
 pub trait BasicNoCr2Instance: CoreInstance {}
 /// Basic timer instance.