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refactor: update DMA transfer functions to support separate memory and peripheral word types
1 parent 03dd503 commit 50e98a9

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2 files changed

+21
-15
lines changed

2 files changed

+21
-15
lines changed

embassy-stm32/src/dma/gpdma.rs

Lines changed: 18 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -143,27 +143,28 @@ impl<'a> Transfer<'a> {
143143
buf.len(),
144144
true,
145145
W::size(),
146+
W::size(),
146147
options,
147148
)
148149
}
149150

150151
/// Create a new write DMA transfer (memory to peripheral).
151-
pub unsafe fn new_write<W: Word>(
152+
pub unsafe fn new_write<MW: Word, PW: Word>(
152153
channel: impl Peripheral<P = impl Channel> + 'a,
153154
request: Request,
154-
buf: &'a [W],
155-
peri_addr: *mut W,
155+
buf: &'a [MW],
156+
peri_addr: *mut PW,
156157
options: TransferOptions,
157158
) -> Self {
158159
Self::new_write_raw(channel, request, buf, peri_addr, options)
159160
}
160161

161162
/// Create a new write DMA transfer (memory to peripheral), using raw pointers.
162-
pub unsafe fn new_write_raw<W: Word>(
163+
pub unsafe fn new_write_raw<MW: Word, PW: Word>(
163164
channel: impl Peripheral<P = impl Channel> + 'a,
164165
request: Request,
165-
buf: *const [W],
166-
peri_addr: *mut W,
166+
buf: *const [MW],
167+
peri_addr: *mut PW,
167168
options: TransferOptions,
168169
) -> Self {
169170
into_ref!(channel);
@@ -173,21 +174,22 @@ impl<'a> Transfer<'a> {
173174
request,
174175
Dir::MemoryToPeripheral,
175176
peri_addr as *const u32,
176-
buf as *const W as *mut u32,
177+
buf as *const MW as *mut u32,
177178
buf.len(),
178179
true,
179-
W::size(),
180+
MW::size(),
181+
PW::size(),
180182
options,
181183
)
182184
}
183185

184186
/// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly.
185-
pub unsafe fn new_write_repeated<W: Word>(
187+
pub unsafe fn new_write_repeated<MW: Word, PW: Word>(
186188
channel: impl Peripheral<P = impl Channel> + 'a,
187189
request: Request,
188-
repeated: &'a W,
190+
repeated: &'a MW,
189191
count: usize,
190-
peri_addr: *mut W,
192+
peri_addr: *mut PW,
191193
options: TransferOptions,
192194
) -> Self {
193195
into_ref!(channel);
@@ -197,10 +199,11 @@ impl<'a> Transfer<'a> {
197199
request,
198200
Dir::MemoryToPeripheral,
199201
peri_addr as *const u32,
200-
repeated as *const W as *mut u32,
202+
repeated as *const MW as *mut u32,
201203
count,
202204
false,
203-
W::size(),
205+
MW::size(),
206+
PW::size(),
204207
options,
205208
)
206209
}
@@ -214,6 +217,7 @@ impl<'a> Transfer<'a> {
214217
mem_len: usize,
215218
incr_mem: bool,
216219
data_size: WordSize,
220+
dst_size: WordSize,
217221
_options: TransferOptions,
218222
) -> Self {
219223
// BNDT is specified as bytes, not as number of transfers.
@@ -234,7 +238,7 @@ impl<'a> Transfer<'a> {
234238
ch.llr().write(|_| {}); // no linked list
235239
ch.tr1().write(|w| {
236240
w.set_sdw(data_size.into());
237-
w.set_ddw(data_size.into());
241+
w.set_ddw(dst_size.into());
238242
w.set_sinc(dir == Dir::MemoryToPeripheral && incr_mem);
239243
w.set_dinc(dir == Dir::PeripheralToMemory && incr_mem);
240244
});

embassy-stm32/src/timer/simple_pwm.rs

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -416,8 +416,10 @@ macro_rules! impl_waveform_chx {
416416
}
417417
#[cfg(not(any(stm32l0)))]
418418
TimerBits::Bits32 => {
419+
#[cfg(not(any(bdma, gpdma)))]
420+
panic!("unsupported timer bits");
421+
419422
#[cfg(any(bdma, gpdma))]
420-
panic("unsupported timer bits");
421423
Transfer::new_write(
422424
&mut dma,
423425
req,

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