wip

Author: xoviat

embassy-stm32/src/timer/low_level.rs

@@ -303,6 +303,7 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
     pub fn bits(&self) -> TimerBits {
         match T::Word::bits() {
             16 => TimerBits::Bits16,
+            #[cfg(not(stm32l0))]
             32 => TimerBits::Bits32,
             _ => unreachable!(),
         }
@@ -332,6 +333,9 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
 
         let regs = self.regs_gp32_unchecked();
         regs.psc().write_value(psc);
+        #[cfg(stm32l0)]
+        regs.arr().write(|r| r.set_arr(unwrap!(arr.try_into())));
+        #[cfg(not(stm32l0))]
         regs.arr().write_value(arr.into());
     }
 
@@ -382,7 +386,10 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
         let timer_f = T::frequency();
 
         let regs = self.regs_gp32_unchecked();
+        #[cfg(not(stm32l0))]
         let arr = regs.arr().read();
+        #[cfg(stm32l0)]
+        let arr = regs.arr().read().arr();
         let psc = regs.psc().read();
 
         timer_f / arr / (psc + 1)
@@ -457,7 +464,10 @@ impl<'d, T: GeneralInstance1Channel> Timer<'d, T> {
         let arr = ticks;
 
         let regs = self.regs_gp32_unchecked();
+        #[cfg(not(stm32l0))]
         regs.arr().write_value(arr.into());
+        #[cfg(stm32l0)]
+        regs.arr().write(|r| r.set_arr(unwrap!(arr.try_into())));
 
         regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTER_ONLY));
         regs.egr().write(|r| r.set_ug(true));