Fix CI, rename private feature, address comments from dirbaio.

Author: CBJamo

embassy-rp/Cargo.toml

@@ -14,8 +14,9 @@ src_base = "https://github.com/embassy-rs/embassy/blob/embassy-rp-v$VERSION/emba
 src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-rp/src/"
 features = ["defmt", "unstable-pac", "time-driver"]
 flavors = [
-    { name = "rp2040", target = "thumbv6m-none-eabi" },
-    { name = "rp235x", target = "thumbv8m.main-none-eabi" },
+    { name = "rp2040", target = "thumbv6m-none-eabi", features = ["rp2040"] },
+    { name = "rp235xa", target = "thumbv8m.main-none-eabi", features = ["rp235xa"] },
+    { name = "rp235xb", target = "thumbv8m.main-none-eabi", features = ["rp235xb"] },
 ]
 
 [package.metadata.docs.rs]
@@ -89,10 +90,13 @@ boot2-w25x10cl = []
 ## ```
 boot2-none = []
 
+## Configure the hal for use with the rp2040
 rp2040 = ["rp-pac/rp2040"]
-rp235x = ["rp-pac/rp235x"]
-rp235xa = ["rp235x"]
-rp235xb = ["rp235x"]
+_rp235x = ["rp-pac/rp235x"]
+## Configure the hal for use with the rp235xA
+rp235xa = ["_rp235x"]
+## Configure the hal for use with the rp235xB
+rp235xb = ["_rp235x"]
 
 # Add a binary-info header block containing picotool-compatible metadata.
 #

embassy-rp/src/adc.rs

@@ -35,7 +35,7 @@ impl<'p> Channel<'p> {
     pub fn new_pin(pin: impl Peripheral<P = impl AdcPin + 'p> + 'p, pull: Pull) -> Self {
         into_ref!(pin);
         pin.pad_ctrl().modify(|w| {
-            #[cfg(feature = "rp235x")]
+            #[cfg(feature = "_rp235x")]
             w.set_iso(false);
             // manual says:
             //
@@ -234,7 +234,7 @@ impl<'d> Adc<'d, Async> {
     ) -> Result<(), Error> {
         #[cfg(feature = "rp2040")]
         let mut rrobin = 0_u8;
-        #[cfg(feature = "rp235x")]
+        #[cfg(feature = "_rp235x")]
         let mut rrobin = 0_u16;
         for c in channels {
             rrobin |= 1 << c;

embassy-rp/src/binary_info/mod.rs

@@ -4,13 +4,12 @@
 //! and "rt" features:
 //!
 //! ```
-//! # use rp235x_hal as hal;
 //! #[link_section = ".bi_entries"]
 //! #[used]
-//! pub static PICOTOOL_ENTRIES: [hal::binary_info::EntryAddr; 3] = [
-//!     hal::binary_info_rp_program_name!(c"Program Name Here"),
-//!     hal::binary_info_rp_cargo_version!(),
-//!     hal::binary_info_int!(hal::binary_info::make_tag(b"JP"), 0x0000_0001, 0x12345678),
+//! pub static PICOTOOL_ENTRIES: [embassy_rp::binary_info::EntryAddr; 3] = [
+//!     embassy_rp::binary_info_rp_program_name!(c"Program Name Here"),
+//!     embassy_rp::binary_info_rp_cargo_version!(),
+//!     embassy_rp::binary_info_int!(embassy_rp::binary_info::make_tag(b"JP"), 0x0000_0001, 0x12345678),
 //! ];
 //! ```
 
@@ -163,8 +162,7 @@ pub const fn rp_boot2_name(value: &'static core::ffi::CStr) -> StringEntry {
 /// Create a tag from two ASCII letters.
 ///
 /// ```
-/// # use rp235x_hal as hal;
-/// let tag = hal::binary_info::make_tag(b"RP");
+/// let tag = embassy_rp::binary_info::make_tag(b"RP");
 /// assert_eq!(tag, 0x5052);
 /// ```
 pub const fn make_tag(c: &[u8; 2]) -> u16 {

embassy-rp/src/clocks.rs

@@ -311,10 +311,10 @@ pub struct SysClkConfig {
     #[cfg(feature = "rp2040")]
     pub div_frac: u8,
     /// SYS clock divider.
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     pub div_int: u16,
     /// SYS clock fraction.
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     pub div_frac: u16,
 }
 
@@ -430,12 +430,12 @@ pub(crate) unsafe fn init(config: ClockConfig) {
     c.clk_sys_ctrl().modify(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
     #[cfg(feature = "rp2040")]
     while c.clk_sys_selected().read() != 1 {}
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     while c.clk_sys_selected().read() != pac::clocks::regs::ClkSysSelected(1) {}
     c.clk_ref_ctrl().modify(|w| w.set_src(ClkRefCtrlSrc::ROSC_CLKSRC_PH));
     #[cfg(feature = "rp2040")]
     while c.clk_ref_selected().read() != 1 {}
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     while c.clk_ref_selected().read() != pac::clocks::regs::ClkRefSelected(1) {}
 
     // Reset the PLLs
@@ -506,7 +506,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
     });
     #[cfg(feature = "rp2040")]
     while c.clk_ref_selected().read() != (1 << ref_src as u32) {}
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     while c.clk_ref_selected().read() != pac::clocks::regs::ClkRefSelected(1 << ref_src as u32) {}
     c.clk_ref_div().write(|w| {
         w.set_int(config.ref_clk.div);
@@ -539,7 +539,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
         c.clk_sys_ctrl().write(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
         #[cfg(feature = "rp2040")]
         while c.clk_sys_selected().read() != (1 << ClkSysCtrlSrc::CLK_REF as u32) {}
-        #[cfg(feature = "rp235x")]
+        #[cfg(feature = "_rp235x")]
         while c.clk_sys_selected().read() != pac::clocks::regs::ClkSysSelected(1 << ClkSysCtrlSrc::CLK_REF as u32) {}
     }
     c.clk_sys_ctrl().write(|w| {
@@ -549,7 +549,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
 
     #[cfg(feature = "rp2040")]
     while c.clk_sys_selected().read() != (1 << sys_src as u32) {}
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     while c.clk_sys_selected().read() != pac::clocks::regs::ClkSysSelected(1 << sys_src as u32) {}
 
     c.clk_sys_div().write(|w| {
@@ -661,7 +661,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
     }
 
     // rp235x specific clocks
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     {
         // TODO hstx clock
         peris.set_hstx(false);
@@ -903,7 +903,8 @@ pub enum GpoutSrc {
     /// ADC.
     Adc = ClkGpoutCtrlAuxsrc::CLK_ADC as _,
     // RTC.
-    //Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC as _,
+    #[cfg(feature = "rp2040")]
+    Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC as _,
     /// REF.
     Ref = ClkGpoutCtrlAuxsrc::CLK_REF as _,
 }
@@ -934,7 +935,7 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
     }
 
     /// Set clock divider.
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     pub fn set_div(&self, int: u16, frac: u16) {
         let c = pac::CLOCKS;
         c.clk_gpout_div(self.gpout.number()).write(|w| {

embassy-rp/src/dma.rs

@@ -147,7 +147,7 @@ fn copy_inner<'a, C: Channel>(
     p.trans_count().write(|w| {
         *w = len as u32;
     });
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     p.trans_count().write(|w| {
         w.set_mode(0.into());
         w.set_count(len as u32);
@@ -208,7 +208,10 @@ impl<'a, C: Channel> Future for Transfer<'a, C> {
     }
 }
 
+#[cfg(feature = "rp2040")]
 pub(crate) const CHANNEL_COUNT: usize = 12;
+#[cfg(feature = "_rp235x")]
+pub(crate) const CHANNEL_COUNT: usize = 16;
 const NEW_AW: AtomicWaker = AtomicWaker::new();
 static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT];
 
@@ -303,11 +306,11 @@ channel!(DMA_CH8, 8);
 channel!(DMA_CH9, 9);
 channel!(DMA_CH10, 10);
 channel!(DMA_CH11, 11);
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 channel!(DMA_CH12, 12);
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 channel!(DMA_CH13, 13);
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 channel!(DMA_CH14, 14);
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 channel!(DMA_CH15, 15);

embassy-rp/src/flash.rs

@@ -669,8 +669,10 @@ mod ram_helpers {
 
     #[inline(never)]
     #[link_section = ".data.ram_func"]
-    #[cfg(feature = "rp235x")]
-    unsafe fn write_flash_inner(_addr: u32, _len: u32, _data: Option<&[u8]>, _ptrs: *const FlashFunctionPointers) {}
+    #[cfg(feature = "_rp235x")]
+    unsafe fn write_flash_inner(_addr: u32, _len: u32, _data: Option<&[u8]>, _ptrs: *const FlashFunctionPointers) {
+        todo!();
+    }
 
     #[repr(C)]
     struct FlashCommand {
@@ -891,8 +893,10 @@ mod ram_helpers {
 
     #[inline(never)]
     #[link_section = ".data.ram_func"]
-    #[cfg(feature = "rp235x")]
-    unsafe fn read_flash_inner(_cmd: FlashCommand, _ptrs: *const FlashFunctionPointers) {}
+    #[cfg(feature = "_rp235x")]
+    unsafe fn read_flash_inner(_cmd: FlashCommand, _ptrs: *const FlashFunctionPointers) {
+        todo!();
+    }
 }
 
 /// Make sure to uphold the contract points with rp2040-flash.
@@ -906,7 +910,7 @@ pub(crate) unsafe fn in_ram(operation: impl FnOnce()) -> Result<(), Error> {
     }
 
     // Make sure CORE1 is paused during the entire duration of the RAM function
-    //crate::multicore::pause_core1();
+    crate::multicore::pause_core1();
 
     critical_section::with(|_| {
         // Wait for all DMA channels in flash to finish before ram operation

embassy-rp/src/gpio.rs

@@ -14,7 +14,12 @@ use crate::pac::SIO;
 use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
 
 const NEW_AW: AtomicWaker = AtomicWaker::new();
+
+#[cfg(any(feature = "rp2040", feature = "rp235xa"))]
 const BANK0_PIN_COUNT: usize = 30;
+#[cfg(feature = "rp235xb")]
+const BANK0_PIN_COUNT: usize = 48;
+
 static BANK0_WAKERS: [AtomicWaker; BANK0_PIN_COUNT] = [NEW_AW; BANK0_PIN_COUNT];
 #[cfg(feature = "qspi-as-gpio")]
 const QSPI_PIN_COUNT: usize = 6;
@@ -180,7 +185,7 @@ impl<'d> Input<'d> {
     }
 
     /// Set the pin's pad isolation
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     #[inline]
     pub fn set_pad_isolation(&mut self, isolate: bool) {
         self.pin.set_pad_isolation(isolate)
@@ -422,7 +427,7 @@ impl<'d> Output<'d> {
     }
 
     /// Set the pin's pad isolation
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     #[inline]
     pub fn set_pad_isolation(&mut self, isolate: bool) {
         self.pin.set_pad_isolation(isolate)
@@ -555,7 +560,7 @@ impl<'d> OutputOpenDrain<'d> {
     }
 
     /// Set the pin's pad isolation
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     #[inline]
     pub fn set_pad_isolation(&mut self, isolate: bool) {
         self.pin.set_pad_isolation(isolate)
@@ -581,15 +586,15 @@ impl<'d> Flex<'d> {
         into_ref!(pin);
 
         pin.pad_ctrl().write(|w| {
-            #[cfg(feature = "rp235x")]
+            #[cfg(feature = "_rp235x")]
             w.set_iso(false);
             w.set_ie(true);
         });
 
         pin.gpio().ctrl().write(|w| {
             #[cfg(feature = "rp2040")]
             w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0 as _);
-            #[cfg(feature = "rp235x")]
+            #[cfg(feature = "_rp235x")]
             w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIOB_PROC_0 as _);
         });
 
@@ -788,7 +793,7 @@ impl<'d> Flex<'d> {
     }
 
     /// Set the pin's pad isolation
-    #[cfg(feature = "rp235x")]
+    #[cfg(feature = "_rp235x")]
     #[inline]
     pub fn set_pad_isolation(&mut self, isolate: bool) {
         self.pin.pad_ctrl().modify(|w| {

embassy-rp/src/i2c.rs

@@ -363,7 +363,7 @@ where
 {
     pin.gpio().ctrl().write(|w| w.set_funcsel(3));
     pin.pad_ctrl().write(|w| {
-        #[cfg(feature = "rp235x")]
+        #[cfg(feature = "_rp235x")]
         w.set_iso(false);
         w.set_schmitt(true);
         w.set_slewfast(false);

embassy-rp/src/lib.rs

@@ -15,9 +15,9 @@ mod critical_section_impl;
 mod intrinsics;
 
 pub mod adc;
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 pub mod binary_info;
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 pub mod block;
 #[cfg(feature = "rp2040")]
 pub mod bootsel;
@@ -92,7 +92,7 @@ embassy_hal_internal::interrupt_mod!(
     SWI_IRQ_5,
 );
 
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 embassy_hal_internal::interrupt_mod!(
     TIMER0_IRQ_0,
     TIMER0_IRQ_1,
@@ -267,7 +267,7 @@ embassy_hal_internal::peripherals! {
     BOOTSEL,
 }
 
-#[cfg(feature = "rp235x")]
+#[cfg(feature = "_rp235x")]
 embassy_hal_internal::peripherals! {
     PIN_0,
     PIN_1,
@@ -497,7 +497,7 @@ fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
     Ok(())
 }
 
-#[cfg(feature = "rp235x")]
+#[cfg(all(feature = "_rp235x", armv8m))]
 #[inline(always)]
 fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
     let core = unsafe { cortex_m::Peripherals::steal() };
@@ -515,6 +515,14 @@ fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
     Ok(())
 }
 
+// This is to hack around cortex_m defaulting to ARMv7 when building tests,
+// so the compile fails when we try to use ARMv8 peripherals.
+#[cfg(all(feature = "_rp235x", not(armv8m)))]
+#[inline(always)]
+fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
+    Ok(())
+}
+
 /// HAL configuration for RP.
 pub mod config {
     use crate::clocks::ClockConfig;

embassy-rp/src/multicore.rs

@@ -109,7 +109,7 @@ unsafe fn SIO_IRQ_PROC1() {
     }
 }
 
-#[cfg(all(feature = "rt", feature = "rp235x"))]
+#[cfg(all(feature = "rt", feature = "_rp235x"))]
 #[interrupt]
 #[link_section = ".data.ram_func"]
 unsafe fn SIO_IRQ_FIFO() {
@@ -164,7 +164,7 @@ where
         unsafe {
             interrupt::SIO_IRQ_PROC1.enable()
         };
-        #[cfg(feature = "rp235x")]
+        #[cfg(feature = "_rp235x")]
         unsafe {
             interrupt::SIO_IRQ_FIFO.enable()
         };