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1 change: 1 addition & 0 deletions embassy-stm32/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

## Unreleased - ReleaseDate

- fix: cycle usart on idle termination
- fix: Fixed ADC4 enable() for WBA
- feat: allow use of anyadcchannel for adc4
- fix: fix incorrect logic for buffered usart transmission complete.
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4 changes: 4 additions & 0 deletions embassy-stm32/src/usart/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -765,13 +765,17 @@ impl<'d> UartRx<'d, Async> {
w.set_peie(false);
// disable idle line interrupt
w.set_idleie(false);
// disable uart to clear any data present
w.set_ue(!enable_idle_line_detection)
});
r.cr3().modify(|w| {
// disable Error Interrupt: (Frame error, Noise error, Overrun error)
w.set_eie(false);
// disable DMA Rx Request
w.set_dmar(false);
});

r.cr1().modify(|w| w.set_ue(true));
});

let ch = self.rx_dma.as_mut().unwrap();
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