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diondokterdiondokter
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Added all other chips too
1 parent c2a0fa2 commit 7f64766

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-11
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+65
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‎stm32-data-gen/src/memory.rs‎

Lines changed: 65 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -142,9 +142,15 @@ static MEMS: RegexMap<&[&[Mem]]> = RegexMap::new(&[
142142
("STM32F4(05|07).E", &[mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 112 }, SRAM2 { 0x2001c000 16 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes } )]),
143143
("STM32F4(11|46).E", &[mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 128 }, OTP { 0x1fff7800 528 bytes })]),
144144
("STM32F4[14]..C", &[mem!(BANK_1 { 0x08000000 256 }, SRAM { 0x20000000 128 }, OTP { 0x1fff7800 528 bytes })]),
145-
("STM32F4[23]..G", &[mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 192 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes })]),
145+
("STM32F4[23]..G", &[
146+
mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 192 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes }),
147+
mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, SRAM { 0x20000000 192 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes }),
148+
]),
146149
("STM32F4[23]..I", &[mem!(BANK_1 { 0x08000000 1024 }, BANK_2 { 0x08100000 1024 }, SRAM { 0x20000000 192 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes })]),
147-
("STM32F4[67]..G", &[mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 320 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes })]),
150+
("STM32F4[67]..G", &[
151+
mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 320 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes }),
152+
mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, SRAM { 0x20000000 320 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes }),
153+
]),
148154
("STM32F4[67]..I", &[mem!(BANK_1 { 0x08000000 1024 }, BANK_2 { 0x08100000 1024 }, SRAM { 0x20000000 320 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes })]),
149155
("STM32F40..B", &[mem!(BANK_1 { 0x08000000 128 }, SRAM { 0x20000000 64 }, OTP { 0x1fff7800 528 bytes })]),
150156
("STM32F40..C", &[mem!(BANK_1 { 0x08000000 256 }, SRAM { 0x20000000 64 }, OTP { 0x1fff7800 528 bytes })]),
@@ -160,16 +166,26 @@ static MEMS: RegexMap<&[&[Mem]]> = RegexMap::new(&[
160166
("STM32F469.E", &[mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 320 }, CCMRAM { 0x10000000 64 rw }, OTP { 0x1fff7800 528 bytes })]),
161167
// F7
162168
("STM32F7...C", &[mem!(BANK_1 { 0x08000000 256 }, DTCM { 0x20000000 64 }, SRAM { 0x20010000 192 })]),
169+
("STM32F7[67]..I", &[
170+
mem!(BANK_1 { 0x08000000 2048 }, DTCM { 0x20000000 128 }, SRAM { 0x20020000 384 }),
171+
mem!(BANK_1 { 0x08000000 1024 }, BANK_2 { 0x08100000 1024 }, DTCM { 0x20000000 128 }, SRAM { 0x20020000 384 }),
172+
]),
163173
("STM32F7...I", &[mem!(BANK_1 { 0x08000000 2048 }, DTCM { 0x20000000 128 }, SRAM { 0x20020000 384 })]),
164174
("STM32F7[23]..E", &[mem!(BANK_1 { 0x08000000 512 }, DTCM { 0x20000000 64 }, SRAM { 0x20010000 192 }, OTP { 0x1ff07800 528 bytes })]),
165175
("STM32F7[45]..G", &[mem!(BANK_1 { 0x08000000 1024 }, DTCM { 0x20000000 64 }, SRAM { 0x20010000 256 }, OTP { 0x08fff000 2 })]),
166176
("STM32F73..8", &[mem!(BANK_1 { 0x08000000 64 }, DTCM { 0x20000000 64 }, SRAM { 0x20010000 192 })]),
167177
("STM32F74..E", &[mem!(BANK_1 { 0x08000000 512 }, DTCM { 0x20000000 64 }, SRAM { 0x20010000 256 }, OTP { 0x08fff000 2 })]),
168178
("STM32F75..8", &[mem!(BANK_1 { 0x08000000 64 }, DTCM { 0x20000000 64 }, SRAM { 0x20010000 256 }, OTP { 0x1ff0f000 1 })]),
169-
("STM32F76..G", &[mem!(BANK_1 { 0x08000000 1024 }, DTCM { 0x20000000 128 }, SRAM { 0x20020000 384 }, OTP { 0x1ff0f000 1 })]),
179+
("STM32F76..G", &[
180+
mem!(BANK_1 { 0x08000000 1024 }, DTCM { 0x20000000 128 }, SRAM { 0x20020000 384 }, OTP { 0x1ff0f000 1 }),
181+
mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, DTCM { 0x20000000 128 }, SRAM { 0x20020000 384 }, OTP { 0x1ff0f000 1 }),
182+
]),
170183
// G0
171184
("STM32G0...4", &[mem!(BANK_1 { 0x08000000 16 }, SRAM { 0x20000000 8 })]),
172-
("STM32G0...C", &[mem!(BANK_1 { 0x08000000 256 }, SRAM { 0x20000000 144 })]),
185+
("STM32G0...C", &[
186+
mem!(BANK_1 { 0x08000000 256 }, SRAM { 0x20000000 144 }),
187+
mem!(BANK_1 { 0x08000000 128 }, BANK_2 { 0x08020000 128 }, SRAM { 0x20000000 144 }),
188+
]),
173189
("STM32G0...E", &[mem!(BANK_1 { 0x08000000 256 }, BANK_2 { 0x08040000 256 }, SRAM { 0x20000000 144 })]),
174190
("STM32G0[34]..6", &[mem!(BANK_1 { 0x08000000 32 }, SRAM { 0x20000000 8 })]),
175191
("STM32G0[34]..8", &[mem!(BANK_1 { 0x08000000 64 }, SRAM { 0x20000000 8 })]),
@@ -265,13 +281,28 @@ static MEMS: RegexMap<&[&[Mem]]> = RegexMap::new(&[
265281
("STM32L4[78]..G", &[mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, SRAM { 0x20000000 96 }, SRAM2_ICODE { 0x10000000 32 })]),
266282
("STM32L4[9A]..G", &[mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, SRAM { 0x20000000 256 }, SRAM2 { 0x20040000 64 }, SRAM2_ICODE { 0x10000000 64 })]),
267283
// L4+
268-
("STM32L4P..E", &[mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 320 })]),
269-
("STM32L4[PQ]..G", &[mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 320 })]),
270-
("STM32L4R..G", &[mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 640 })]),
271-
("STM32L4[RS]..I", &[mem!(BANK_1 { 0x08000000 2048 }, SRAM { 0x20000000 640 })]),
284+
("STM32L4P..E", &[
285+
mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 320 }),
286+
mem!(BANK_1 { 0x08000000 256 }, BANK_2 { 0x08040000 256 }, SRAM { 0x20000000 320 }),
287+
]),
288+
("STM32L4[PQ]..G", &[
289+
mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 320 }),
290+
mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, SRAM { 0x20000000 320 })
291+
]),
292+
("STM32L4R..G", &[
293+
mem!(BANK_1 { 0x08000000 1024 }, SRAM { 0x20000000 640 }),
294+
mem!(BANK_1 { 0x08000000 512 }, BANK_2 { 0x08080000 512 }, SRAM { 0x20000000 640 }),
295+
]),
296+
("STM32L4[RS]..I", &[
297+
mem!(BANK_1 { 0x08000000 2048 }, SRAM { 0x20000000 640 }),
298+
mem!(BANK_1 { 0x08000000 1024 }, BANK_2 { 0x08100000 10024 }, SRAM { 0x20000000 640 })
299+
]),
272300
// L5
273301
("STM32L5...C", &[mem!(BANK_1 { 0x08000000 256 }, SRAM { 0x20000000 256 })]),
274-
("STM32L5...E", &[mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 256 })]),
302+
("STM32L5...E", &[
303+
mem!(BANK_1 { 0x08000000 512 }, SRAM { 0x20000000 256 }),
304+
mem!(BANK_1 { 0x08000000 256 }, BANK_2 { 0x08040000 256 }, SRAM { 0x20000000 256 }),
305+
]),
275306
// U0
276307
("STM32U031.4", &[mem!(BANK_1 { 0x08000000 16 }, SRAM { 0x20000000 12 }, OTP { 0x1fff6800 1 })]),
277308
("STM32U031.6", &[mem!(BANK_1 { 0x08000000 32 }, SRAM { 0x20000000 12 }, OTP { 0x1fff6800 1 })]),
@@ -327,9 +358,25 @@ static FLASH_INFO: RegexMap<&[FlashInfo]> = RegexMap::new(&[
327358
("STM32F1.*", &[FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 2*1024, 0)] }]),
328359
("STM32F2.*", &[FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] }]),
329360
("STM32F3.*", &[FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] }]),
361+
("STM32F4[23]..G", &[
362+
FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] },
363+
FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] }
364+
]),
365+
("STM32F4[67]..G", &[
366+
FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] },
367+
FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] }
368+
]),
330369
("STM32F4.*", &[FlashInfo{ erase_value: 0xFF, write_size: 4, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] }]),
370+
("STM32F7[67]..[IG]", &[
371+
FlashInfo{ erase_value: 0xFF, write_size: 16, erase_size: &[( 32*1024, 4), (128*1024, 1), ( 256*1024, 0)] }, // Single bank
372+
FlashInfo{ erase_value: 0xFF, write_size: 16, erase_size: &[( 16*1024, 4), ( 64*1024, 1), ( 128*1024, 0)] }, // Dual bank
373+
]),
331374
("STM32F7[4567].*", &[FlashInfo{ erase_value: 0xFF, write_size: 16, erase_size: &[( 32*1024, 4), (128*1024, 1), ( 256*1024, 0)] }]),
332375
("STM32F7.*", &[FlashInfo{ erase_value: 0xFF, write_size: 16, erase_size: &[( 16*1024, 4), (64*1024, 1), ( 128*1024, 0)] }]),
376+
("STM32G0...C", &[
377+
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] },
378+
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] },
379+
]),
333380
("STM32G0.*", &[FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] }]),
334381
("STM32G4[78].*", &[
335382
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 4*1024, 0)] }, // Single bank
@@ -340,10 +387,17 @@ static FLASH_INFO: RegexMap<&[FlashInfo]> = RegexMap::new(&[
340387
("STM32H7[RS].*", &[FlashInfo{ erase_value: 0xFF, write_size: 16, erase_size: &[( 8*1024, 0)] }]),
341388
("STM32H7[AB].*", &[FlashInfo{ erase_value: 0xFF, write_size: 32, erase_size: &[( 8*1024, 0)] }]),
342389
("STM32H7.*", &[FlashInfo{ erase_value: 0xFF, write_size: 32, erase_size: &[(128*1024, 0)] }]),
343-
("STM32L4[PQRS].*", &[FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 8*1024, 0)] }]),
390+
("STM32L4[PQRS].*", &[
391+
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 8*1024, 0)] }, // Single bank
392+
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 4*1024, 0)] }, // Dual bank
393+
]),
344394
("STM32L4.*", &[FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] }]),
345395
("STM32L0.*", &[FlashInfo{ erase_value: 0x00, write_size: 4, erase_size: &[( 128, 0)] }]),
346396
("STM32L1.*", &[FlashInfo{ erase_value: 0x00, write_size: 4, erase_size: &[( 256, 0)] }]),
397+
("STM32L5...E", &[
398+
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 4*1024, 0)] }, // Single bank
399+
FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] }, // Dual bank
400+
]),
347401
("STM32L5.*", &[FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 4*1024, 0)] }]),
348402
("STM32U0.*", &[FlashInfo{ erase_value: 0xFF, write_size: 8, erase_size: &[( 2*1024, 0)] }]),
349403
("STM32U5.*", &[FlashInfo{ erase_value: 0xFF, write_size: 16, erase_size: &[( 8*1024, 0)] }]),
@@ -361,7 +415,7 @@ pub fn get(chip: &str) -> Vec<Vec<Memory>> {
361415
assert_eq!(
362416
mems_variations.len(),
363417
flash_variations.len(),
364-
"All memory variants must be present in both the mems and the flash info"
418+
"All memory variants must be present in both the mems and the flash info: {chip}"
365419
);
366420

367421
mems_variations

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