@@ -129,6 +129,11 @@ LOG_MODULE_REGISTER(adc_stm32);
129129 st_adc_has_channel_preselection,\
130130 0, 1) 0)
131131
132+ #define ANY_ADC_HAS_DIFFERENTIAL_SUPPORT \
133+ (DT_INST_FOREACH_STATUS_OKAY_VARGS(IS_EQ_PROP_OR, \
134+ st_adc_has_differential_support,\
135+ 0, 1) 0)
136+
132137#define ANY_CHILD_NODE_IS_DIFFERENTIAL (inst ) \
133138 (DT_INST_FOREACH_CHILD_VARGS(inst, IS_EQ_NODE_PROP_OR, \
134139 zephyr_differential, \
@@ -215,14 +220,15 @@ struct adc_stm32_cfg {
215220 size_t pclk_len ;
216221 uint32_t clk_prescaler ;
217222 const struct pinctrl_dev_config * pcfg ;
218- bool differential_channels_used ;
219223 const uint16_t sampling_time_table [STM32_NB_SAMPLING_TIME ];
220224 int8_t num_sampling_time_common_channels ;
221225 int8_t sequencer_type ;
222226 int8_t oversampler_type ;
223227 int8_t internal_regulator ;
224228 bool has_deep_powerdown :1 ;
225229 bool has_channel_preselection :1 ;
230+ bool has_differential_support :1 ;
231+ bool differential_channels_used :1 ;
226232 int8_t res_table_size ;
227233 const uint32_t res_table [];
228234};
@@ -1334,21 +1340,7 @@ static int adc_stm32_sampling_time_setup(const struct device *dev, uint8_t id,
13341340 return 0 ;
13351341}
13361342
1337- #if defined(STM32F3XX_ADC ) || \
1338- defined(CONFIG_SOC_SERIES_STM32G4X ) || \
1339- defined(CONFIG_SOC_SERIES_STM32H5X ) || \
1340- defined(CONFIG_SOC_SERIES_STM32H7X ) || \
1341- defined(CONFIG_SOC_SERIES_STM32H7RSX ) || \
1342- defined(CONFIG_SOC_SERIES_STM32L4X ) || \
1343- defined(CONFIG_SOC_SERIES_STM32L5X ) || \
1344- defined(CONFIG_SOC_SERIES_STM32U5X ) || \
1345- defined(CONFIG_SOC_SERIES_STM32WBX )
1346- #define DIFFERENTIAL_MODE_SUPPORTED 1
1347- #else
1348- #define DIFFERENTIAL_MODE_SUPPORTED 0
1349- #endif
1350-
1351- #if DIFFERENTIAL_MODE_SUPPORTED
1343+ #if ANY_ADC_HAS_DIFFERENTIAL_SUPPORT
13521344static void set_channel_differential_mode (ADC_TypeDef * adc , uint8_t channel_id , bool differential )
13531345{
13541346 const uint32_t mode = differential ? LL_ADC_DIFFERENTIAL_ENDED : LL_ADC_SINGLE_ENDED ;
@@ -1371,18 +1363,19 @@ static void set_channel_differential_mode(ADC_TypeDef *adc, uint8_t channel_id,
13711363static int adc_stm32_channel_setup (const struct device * dev ,
13721364 const struct adc_channel_cfg * channel_cfg )
13731365{
1374- #if defined(CONFIG_SOC_SERIES_STM32H5X ) || DIFFERENTIAL_MODE_SUPPORTED
13751366 const struct adc_stm32_cfg * config = (const struct adc_stm32_cfg * )dev -> config ;
1367+ #if defined(CONFIG_SOC_SERIES_STM32H5X ) || ANY_ADC_HAS_DIFFERENTIAL_SUPPORT
13761368 ADC_TypeDef * adc = config -> base ;
13771369#endif
13781370
1379- #if !DIFFERENTIAL_MODE_SUPPORTED
1380- if (channel_cfg -> differential ) {
1381- LOG_ERR ("Differential channels not supported on this SOC series" );
1382- return - EINVAL ;
1371+ if (!config -> has_differential_support ) {
1372+ if (channel_cfg -> differential ) {
1373+ LOG_ERR ("Differential channels not supported on this ADC" );
1374+ return - EINVAL ;
1375+ }
13831376 }
1384- #else
1385- if (channel_cfg -> differential && !config -> differential_channels_used ) {
1377+ #if ANY_ADC_HAS_DIFFERENTIAL_SUPPORT
1378+ else if (channel_cfg -> differential && !config -> differential_channels_used ) {
13861379 /* At least one channel must be set to differential mode in the devicetree
13871380 * to cause a differential calibration to be performed during init.
13881381 */
@@ -1990,6 +1983,7 @@ static const struct adc_stm32_cfg adc_stm32_cfg_##index = { \
19901983 DT_INST_STRING_UPPER_TOKEN(index, st_adc_internal_regulator)), \
19911984 .has_deep_powerdown = DT_INST_PROP(index, st_adc_has_deep_powerdown), \
19921985 .has_channel_preselection = DT_INST_PROP(index, st_adc_has_channel_preselection), \
1986+ .has_differential_support = DT_INST_PROP(index, st_adc_has_differential_support), \
19931987 .sampling_time_table = DT_INST_PROP(index, sampling_times), \
19941988 .num_sampling_time_common_channels = \
19951989 DT_INST_PROP_OR(index, num_sampling_time_common_channels, 0),\
0 commit comments