soc: st: stm32: h7x: enable cache management by default

henrikbrixandersen · tpambor · commit b7fd27205018 · 2025-09-01T14:14:39.000+02:00
Enable cache management by default on Cortex-M7 of the STM32H7x
series. Remove cache management enablement from the ST STM32H7B3I-DK
development board.

Signed-off-by: Henrik Brix Andersen &lt;henrik@brixandersen.dk&gt;
diff --git a/boards/st/stm32h7b3i_dk/Kconfig.defconfig b/boards/st/stm32h7b3i_dk/Kconfig.defconfig
@@ -16,9 +16,6 @@ config MEMC
 
 if LVGL
 
-config CACHE_MANAGEMENT
-	default y
-
 config LV_USE_DRAW_DMA2D
 	default y
 
diff --git a/soc/st/stm32/stm32h7x/Kconfig.defconfig b/soc/st/stm32/stm32h7x/Kconfig.defconfig
@@ -14,6 +14,9 @@ config ROM_START_OFFSET
 	default 0x400 if BOOTLOADER_MCUBOOT
 	default 0x0   if !BOOTLOADER_MCUBOOT
 
+config CACHE_MANAGEMENT
+	default y if CPU_CORTEX_M7
+
 if LVGL
 
 config LV_DRAW_DMA2D_HAL_INCLUDE
