Too big for Sipeed Tang Primer 20K

[alberto-grl]

Hello,
I can successfully generate a soc with
./sipeed_tang_primer_20k.py --soc-csv=soc.csf --with-etherbone --cpu-type=vexriscv --cpu-variant=lite --build

I get many warnings but it replies to ping at least. It uses abt 10600 logic elements (LUT 8204) so it would seem there is adequate space left.

But substituting etherbone with ethernet I get
ERROR (RP0006) : The number(41239(36646 LUTs, 705 ALUs, 0 ROM16s, 648 SSRAMs)) of logic in the design exceeds the resource limit(20736) of current device

Is this a real requirement for the Litex ethernet IP? Are there parameters, like FIFO size, that could be tuned?

My setup should be OK, I'm able to run Linux from SD card, wo ethernet of course.

Regards
Alberto