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Changes to allow use of external gate in both scaler and MCS modes.
The change to the software was to invert the polarity of the counter
output signals (i.e. C0O-C7O) and the polarity of the counter gate
signals (i.e. C0GT-C7GT).
The use of an external gate requires an external TTL OR chip.
The OR inputs are the external gate signal and the C0O signal.
The OR output goes to C0GT-C7GT.
The counters are thus disabled by C0O done in scaler mode, and by
a TTL low signal on the external gate in scaler and MCS modes.
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