Fix reverse bitstream step: use heredoc to avoid indentation error

The inline Python passed via `python3 -c` had indented top-level
statements, causing an IndentationError on CI. Switch to a heredoc
(`<< 'PYEOF'`) so the script is fed via stdin with correct indentation.
Also rename `reversed` to `reversed_data` to avoid shadowing the builtin.

https://claude.ai/code/session_01QmPirfEXJ1bsJHb9i98uGS

Author: claude

.github/workflows/build.yml

@@ -22,13 +22,13 @@ jobs:
 
       - name: Reverse bitstream
         run: |
-          python3 -c "
+          python3 << 'PYEOF'
           with open('src/fpga/output_files/ap_core.rbf', 'rb') as f:
               data = f.read()
-          reversed = bytes(int('{:08b}'.format(b)[::-1], 2) for b in data)
+          reversed_data = bytes(int('{:08b}'.format(b)[::-1], 2) for b in data)
           with open('src/fpga/output_files/bitstream.rbf_r', 'wb') as f:
-              f.write(reversed)
-          "
+              f.write(reversed_data)
+          PYEOF
 
       - name: Package core
         run: |