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Pebble QEMU 10.x Port — Progress

Phase 2: Port Pebble Device Models to QEMU 10.x

Goal: Port ~8,500 lines of Pebble device models from QEMU 2.5.0-pebble8 to QEMU 10.x APIs so PebbleOS boots on modern QEMU (prerequisite for Phase 3: WASM compilation).

Step 1: Setup

  • build.sh — overlays Pebble files onto QEMU 10.0, patches Kconfig/meson, configures, builds
  • Vanilla QEMU 10.0 builds with --target-list=arm-softmmu
  • .gitignore created

Step 2: Port STM32 Peripherals

  • include/hw/arm/stm32_common.h — types, enums, IRQ numbers
  • include/hw/arm/stm32_clktree.h — clock tree API
  • include/hw/arm/pebble.h — board types
  • hw/misc/stm32_pebble_rcc.c — RCC clock controller
  • hw/misc/stm32_pebble_clktree.c — clock tree
  • hw/misc/stm32_pebble_common.c — shared helpers
  • hw/gpio/stm32_pebble_gpio.c — GPIO with pin output IRQs
  • hw/misc/stm32_pebble_exti.c — external interrupts
  • hw/misc/stm32_pebble_syscfg.c — system config
  • hw/char/stm32_pebble_uart.c — UART (CharBackend API)
  • hw/ssi/stm32_pebble_spi.c — SPI controller
  • hw/timer/stm32_pebble_tim.c — timers
  • hw/dma/stm32_pebble_dma.c — DMA controller
  • hw/timer/stm32_pebble_rtc.c — RTC
  • hw/misc/stm32_pebble_adc.c — ADC stub
  • hw/misc/stm32_pebble_i2c.c — I2C (rewritten with SB/AF/ADDR protocol)
  • hw/misc/stm32_pebble_crc.c — CRC
  • hw/misc/stm32_pebble_pwr.c — power stub
  • hw/misc/stm32_pebble_flash.c — flash interface stub
  • hw/misc/stm32_pebble_dummy.c — dummy devices

Step 3: SoC Container

  • hw/arm/pebble_stm32f4xx_soc.c — ARMv7MState, flash/SRAM/CCM/SDRAM, all peripherals wired

Step 4: Display

  • hw/display/pebble_snowy_display.c — SSI slave + GraphicHwOps
  • hw/display/pebble_snowy_display.h
  • hw/display/pebble_snowy_display_overlays.h
  • GPIO wiring: G8→CS, G15→RESET, G13→SCLK, G9←DONE, G10←INTN

Step 5: Board/Machine Definitions

  • hw/arm/pebble.c — 6 machine variants
  • hw/arm/pebble_control.c / .h — UART control protocol
  • hw/arm/pebble_robert.c — Robert init
  • hw/arm/pebble_silk.c — Silk init
  • Kconfig, meson.build, default.mak entries
  • patches/pflash_cfi02_cfi_entry.patch — Macronix flash support

Step 6: Build, Debug, Boot

  • Full build succeeds (1898+ compilation units)
  • Firmware loads, vector table correct
  • Bootloader runs (ASCII art, FPGA programming, display init)
  • Firmware v4.9.77-3-geb9f6e61 boots, RTOS scheduler starts
  • Serial output on USART3
  • Display renders frames (47+ frames, 45600 bytes each)
  • Fixed: DMA2 streams 5-7 IRQ routing (68-70, not 61-63) — commit 079d941
  • DMA switched to address_space_write for MMIO dispatch
  • TicToc watchface not starting — needs investigation

Bugs Found & Fixed

  1. DMA IRQ routing (079d941): Non-contiguous STM32F4 DMA stream IRQs. Fixed with lookup tables.
  2. pflash CFI: Macronix MX29VS128FB added via patch.
  3. Display GPIO: CS/RESET/SCLK wired via GPIO G pins.
  4. I2C: Rewritten with proper protocol for firmware compat.

Current Issue

  • TicToc watchface app does not start despite firmware booting successfully
  • Serial log shows NL:2108 'system' 'TicToc' but app doesn't render
  • Display shows frames but content may be blank/wrong

Commits

  • 500d370 — Port Pebble device models to QEMU 10.x (Phase 2 WIP)
  • 079d941 — Fix DMA IRQ routing for non-contiguous STM32F4 stream interrupts