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Use the Spi driver in SpiDma
1 parent dad0624 commit 03c34ef

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+42
-26
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1 file changed

+42
-26
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esp-hal/src/spi/master/dma.rs

Lines changed: 42 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ impl<'d> Spi<'d, Blocking> {
6767
/// ```
6868
#[instability::unstable]
6969
pub fn with_dma(self, channel: impl DmaChannelFor<AnySpi<'d>>) -> SpiDma<'d, Blocking> {
70-
SpiDma::new(self.spi, channel.degrade())
70+
SpiDma::new(self, channel.degrade())
7171
}
7272
}
7373

@@ -115,7 +115,7 @@ pub struct SpiDma<'d, Dm>
115115
where
116116
Dm: DriverMode,
117117
{
118-
spi: SpiWrapper<'d>,
118+
spi: Spi<'d, Dm>,
119119
pub(crate) channel: Channel<Dm, PeripheralDmaChannel<AnySpi<'d>>>,
120120
#[cfg(all(esp32, spi_address_workaround))]
121121
address_buffer: DmaTxBuf,
@@ -127,16 +127,21 @@ impl<'d> SpiDma<'d, Blocking> {
127127
/// Converts the SPI instance into async mode.
128128
#[instability::unstable]
129129
pub fn into_async(mut self) -> SpiDma<'d, Async> {
130-
self.set_interrupt_handler(self.spi.info().async_handler);
130+
self.set_interrupt_handler(self.spi().info().async_handler);
131131
SpiDma {
132-
spi: self.spi,
132+
spi: self.spi.into_async(),
133133
channel: self.channel.into_async(),
134134
#[cfg(all(esp32, spi_address_workaround))]
135135
address_buffer: self.address_buffer,
136136
}
137137
}
138138

139-
pub(super) fn new(spi: SpiWrapper<'d>, channel: PeripheralDmaChannel<AnySpi<'d>>) -> Self {
139+
pub(super) fn new(
140+
spi_driver: Spi<'d, Blocking>,
141+
channel: PeripheralDmaChannel<AnySpi<'d>>,
142+
) -> Self {
143+
let spi = &spi_driver.spi;
144+
140145
let channel = Channel::new(channel);
141146
channel.runtime_ensure_compatible(&spi.spi);
142147
#[cfg(all(esp32, spi_address_workaround))]
@@ -159,13 +164,13 @@ impl<'d> SpiDma<'d, Blocking> {
159164
))
160165
};
161166

162-
let (_info, state) = spi.dma_parts();
167+
let (_info, state) = spi.spi.dma_parts();
163168

164169
state.tx_transfer_in_progress.set(false);
165170
state.rx_transfer_in_progress.set(false);
166171

167172
Self {
168-
spi,
173+
spi: spi_driver,
169174
channel,
170175
#[cfg(all(esp32, spi_address_workaround))]
171176
address_buffer,
@@ -225,9 +230,9 @@ impl<'d> SpiDma<'d, Async> {
225230
/// Converts the SPI instance into async mode.
226231
#[instability::unstable]
227232
pub fn into_blocking(self) -> SpiDma<'d, Blocking> {
228-
self.spi.disable_peri_interrupt_on_all_cores();
233+
self.spi().disable_peri_interrupt_on_all_cores();
229234
SpiDma {
230-
spi: self.spi,
235+
spi: self.spi.into_blocking(),
231236
channel: self.channel.into_blocking(),
232237
#[cfg(all(esp32, spi_address_workaround))]
233238
address_buffer: self.address_buffer,
@@ -288,7 +293,7 @@ impl<'d> SpiDma<'d, Async> {
288293

289294
impl<Dm> core::fmt::Debug for SpiDma<'_, Dm>
290295
where
291-
Dm: DriverMode,
296+
Dm: DriverMode + core::fmt::Debug,
292297
{
293298
/// Formats the `SpiDma` instance for debugging purposes.
294299
///
@@ -313,19 +318,19 @@ impl<Dm> SpiDma<'_, Dm>
313318
where
314319
Dm: DriverMode,
315320
{
321+
fn spi(&self) -> &SpiWrapper<'_> {
322+
&self.spi.spi
323+
}
324+
316325
fn driver(&self) -> Driver {
317-
Driver {
318-
info: self.spi.info(),
319-
state: self.spi.state(),
320-
}
326+
self.spi.driver()
321327
}
322328

323329
fn dma_driver(&self) -> DmaDriver {
324-
let (_info, state) = self.spi.dma_parts();
325330
DmaDriver {
326331
driver: self.driver(),
327-
dma_peripheral: self.spi.dma_peripheral(),
328-
state,
332+
dma_peripheral: self.spi().dma_peripheral(),
333+
state: self.spi().dma_state(),
329334
}
330335
}
331336

@@ -439,12 +444,6 @@ where
439444
}
440445

441446
fn cancel_transfer(&mut self) {
442-
// The SPI peripheral is controlling how much data we transfer, so let's
443-
// update its counter.
444-
// 0 doesn't take effect on ESP32 and cuts the currently transmitted byte
445-
// immediately.
446-
// 1 seems to stop after transmitting the current byte which is somewhat less
447-
// impolite.
448447
let state = self.dma_driver().state;
449448
if state.tx_transfer_in_progress.get() || state.rx_transfer_in_progress.get() {
450449
self.dma_driver().abort_transfer();
@@ -1244,6 +1243,12 @@ pub(super) struct DmaDriver {
12441243

12451244
impl DmaDriver {
12461245
fn abort_transfer(&self) {
1246+
// The SPI peripheral is controlling how much data we transfer, so let's
1247+
// update its counter.
1248+
// 0 doesn't take effect on ESP32 and cuts the currently transmitted byte
1249+
// immediately.
1250+
// 1 seems to stop after transmitting the current byte which is somewhat less
1251+
// impolite.
12471252
self.driver.configure_datalen(1, 1);
12481253
self.driver.update();
12491254
}
@@ -1520,14 +1525,25 @@ for_each_spi_master!(
15201525
)*
15211526
}
15221527
}
1528+
1529+
#[inline(always)]
1530+
fn dma_state(&self) -> &'static State {
1531+
let (_, state) = self.dma_parts();
1532+
state
1533+
}
1534+
1535+
#[inline(always)]
1536+
fn dma_info(&self) -> &'static Info {
1537+
let (info, _) = self.dma_parts();
1538+
info
1539+
}
15231540
}
15241541
};
15251542
);
15261543

15271544
impl SpiWrapper<'_> {
1528-
#[inline(always)]
1529-
fn dma_parts(&self) -> (&'static Info, &'static State) {
1530-
self.spi.dma_parts()
1545+
fn dma_state(&self) -> &'static State {
1546+
self.spi.dma_state()
15311547
}
15321548

15331549
#[inline(always)]

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