11use crate :: maybe_with_critical_section;
22
3- const ESP_ROM_SPIFLASH_READ : u32 = 0x40062ed8 ;
4- const ESP_ROM_SPIFLASH_ERASE_SECTOR : u32 = 0x40062ccc ;
5- const SPI_READ_STATUS_HIGH : u32 = 0x40062448 ;
6- const SPI_READ_STATUS : u32 = 0x4006226c ;
7- const SPI_WRITE_STATUS : u32 = 0x400622f0 ;
8-
9- const CACHE_FLUSH_ROM : u32 = 0x40009a14 ;
10- const CACHE_READ_ENABLE_ROM : u32 = 0x40009a84 ;
11-
123const SPI_BASE_REG : u32 = 0x3ff42000 ; // SPI peripheral 1, used for SPI flash
134const SPI0_BASE_REG : u32 = 0x3ff43000 ; // SPI peripheral 0, inner state machine
145const SPI_EXT2_REG : u32 = SPI_BASE_REG + 0xF8 ;
@@ -34,23 +25,17 @@ const SPI_WRSR_2B: u32 = 1 << 22;
3425const FLASH_CHIP_ADDR : u32 = 0x3ffae270 ;
3526const FLASH_DUMMY_LEN_PLUS_ADDR : u32 = 0x3ffae290 ;
3627
37- #[ inline( always) ]
38- #[ link_section = ".rwtext" ]
39- pub ( crate ) fn cache_flush_rom ( cpu_num : u32 ) {
40- unsafe {
41- let cache_flush_rom: unsafe extern "C" fn ( u32 ) = core:: mem:: transmute ( CACHE_FLUSH_ROM ) ;
42- cache_flush_rom ( cpu_num)
43- }
44- }
45-
46- #[ inline( always) ]
47- #[ link_section = ".rwtext" ]
48- pub ( crate ) fn cache_read_enable_rom ( cpu_num : u32 ) {
49- unsafe {
50- let cache_read_enable_rom: unsafe extern "C" fn ( u32 ) =
51- core:: mem:: transmute ( CACHE_READ_ENABLE_ROM ) ;
52- cache_read_enable_rom ( cpu_num)
53- }
28+ crate :: rom_fn! {
29+ fn esp_rom_cache_flush( cpu_num: u32 ) = 0x40009a14 ;
30+ fn esp_rom_cache_read_enable( cpu_num: u32 ) = 0x40009a84 ;
31+ fn esp_rom_spiflash_read( src_addr: u32 , data: * const u32 , len: u32 ) -> i32 = 0x40062ed8 ;
32+ fn esp_rom_spiflash_erase_sector( sector_number: u32 ) -> i32 = 0x40062ccc ;
33+ fn esp_rom_spi_read_status_high(
34+ flash_chip: * const EspRomSpiflashChipT ,
35+ status: * mut u32
36+ ) -> i32 = 0x40062448 ;
37+ fn esp_rom_spi_read_status( flash_chip: * const EspRomSpiflashChipT , status: * mut u32 ) -> i32 = 0x4006226c ;
38+ fn esp_rom_spi_write_status( flash_chip: * const EspRomSpiflashChipT , status_value: u32 ) -> i32 = 0x400622f0 ;
5439}
5540
5641#[ inline( always) ]
@@ -59,33 +44,19 @@ pub(crate) fn spi_read_status_high(
5944 flash_chip : * const EspRomSpiflashChipT ,
6045 status : & mut u32 ,
6146) -> i32 {
62- unsafe {
63- let spi_read_status_high: unsafe extern "C" fn (
64- * const EspRomSpiflashChipT ,
65- * mut u32 ,
66- ) -> i32 = core:: mem:: transmute ( SPI_READ_STATUS_HIGH ) ;
67- spi_read_status_high ( flash_chip, status as * mut u32 )
68- }
47+ esp_rom_spi_read_status_high ( flash_chip, status as * mut u32 )
6948}
7049
7150#[ inline( always) ]
7251#[ link_section = ".rwtext" ]
7352pub ( crate ) fn spi_read_status ( flash_chip : * const EspRomSpiflashChipT , status : & mut u32 ) -> i32 {
74- unsafe {
75- let spi_read_status: unsafe extern "C" fn ( * const EspRomSpiflashChipT , * mut u32 ) -> i32 =
76- core:: mem:: transmute ( SPI_READ_STATUS ) ;
77- spi_read_status ( flash_chip, status as * mut u32 )
78- }
53+ esp_rom_spi_read_status ( flash_chip, status as * mut u32 )
7954}
8055
8156#[ inline( always) ]
8257#[ link_section = ".rwtext" ]
8358pub ( crate ) fn spi_write_status ( flash_chip : * const EspRomSpiflashChipT , status_value : u32 ) -> i32 {
84- unsafe {
85- let spi_write_status: unsafe extern "C" fn ( * const EspRomSpiflashChipT , u32 ) -> i32 =
86- core:: mem:: transmute ( SPI_WRITE_STATUS ) ;
87- spi_write_status ( flash_chip, status_value)
88- }
59+ esp_rom_spi_write_status ( flash_chip, status_value)
8960}
9061
9162#[ inline( always) ]
@@ -98,10 +69,10 @@ fn begin() {
9869#[ inline( always) ]
9970#[ link_section = ".rwtext" ]
10071fn end ( ) {
101- cache_flush_rom ( 0 ) ;
102- cache_flush_rom ( 1 ) ;
103- cache_read_enable_rom ( 0 ) ;
104- cache_read_enable_rom ( 1 ) ;
72+ esp_rom_cache_flush ( 0 ) ;
73+ esp_rom_cache_flush ( 1 ) ;
74+ esp_rom_cache_read_enable ( 0 ) ;
75+ esp_rom_cache_read_enable ( 1 ) ;
10576}
10677
10778#[ derive( Debug ) ]
@@ -117,26 +88,18 @@ pub struct EspRomSpiflashChipT {
11788
11889#[ inline( never) ]
11990#[ link_section = ".rwtext" ]
120- pub ( crate ) fn esp_rom_spiflash_read ( src_addr : u32 , data : * const u32 , len : u32 ) -> i32 {
91+ pub ( crate ) fn spiflash_read ( src_addr : u32 , data : * const u32 , len : u32 ) -> i32 {
12192 maybe_with_critical_section ( || {
12293 spiflash_wait_for_ready ( ) ;
123- unsafe {
124- let esp_rom_spiflash_read: unsafe extern "C" fn ( u32 , * const u32 , u32 ) -> i32 =
125- core:: mem:: transmute ( ESP_ROM_SPIFLASH_READ ) ;
126- esp_rom_spiflash_read ( src_addr, data, len)
127- }
94+ esp_rom_spiflash_read ( src_addr, data, len)
12895 } )
12996}
13097
13198#[ inline( never) ]
13299#[ link_section = ".rwtext" ]
133- pub ( crate ) fn esp_rom_spiflash_erase_sector ( sector_number : u32 ) -> i32 {
100+ pub ( crate ) fn spiflash_erase_sector ( sector_number : u32 ) -> i32 {
134101 maybe_with_critical_section ( || {
135- let res = unsafe {
136- let esp_rom_spiflash_erase_sector: unsafe extern "C" fn ( u32 ) -> i32 =
137- core:: mem:: transmute ( ESP_ROM_SPIFLASH_ERASE_SECTOR ) ;
138- esp_rom_spiflash_erase_sector ( sector_number)
139- } ;
102+ let res = esp_rom_spiflash_erase_sector ( sector_number) ;
140103 spiflash_wait_for_ready ( ) ;
141104 res
142105 } )
@@ -154,7 +117,7 @@ fn spi_write_enable() {
154117
155118#[ inline( never) ]
156119#[ link_section = ".rwtext" ]
157- pub ( crate ) fn esp_rom_spiflash_write ( dest_addr : u32 , data : * const u32 , len : u32 ) -> i32 {
120+ pub ( crate ) fn spiflash_write ( dest_addr : u32 , data : * const u32 , len : u32 ) -> i32 {
158121 maybe_with_critical_section ( || {
159122 begin ( ) ;
160123
@@ -250,7 +213,7 @@ fn spiflash_wait_for_ready() {
250213
251214#[ inline( never) ]
252215#[ link_section = ".rwtext" ]
253- pub ( crate ) fn esp_rom_spiflash_unlock ( ) -> i32 {
216+ pub ( crate ) fn spiflash_unlock ( ) -> i32 {
254217 let flashchip = FLASH_CHIP_ADDR as * const EspRomSpiflashChipT ;
255218 if unsafe { ( * flashchip) . device_id } >> 16 & 0xff == 0x9D {
256219 panic ! ( "ISSI flash is not supported" ) ;
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