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bugadanibugadani
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Move SHA algos to metadata (#3844)
1 parent fd66bd3 commit 0c1cc17

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11 files changed

+136
-16
lines changed

11 files changed

+136
-16
lines changed

‎esp-hal/src/sha.rs‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -611,20 +611,21 @@ macro_rules! impl_sha {
611611
// Two working modes
612612
// – Typical SHA
613613
// – DMA-SHA (not implemented yet)
614-
//
615-
// TODO: Allow/Implement SHA512_(u16)
614+
#[cfg(sha_algo_sha_1)]
616615
impl_sha!(Sha1, 0, 20, 64);
617-
#[cfg(not(esp32))]
616+
#[cfg(sha_algo_sha_224)]
618617
impl_sha!(Sha224, 1, 28, 64);
618+
#[cfg(sha_algo_sha_256)]
619619
impl_sha!(Sha256, 2, 32, 64);
620-
#[cfg(any(esp32, esp32s2, esp32s3))]
620+
#[cfg(sha_algo_sha_384)]
621621
impl_sha!(Sha384, 3, 48, 128);
622-
#[cfg(any(esp32, esp32s2, esp32s3))]
622+
#[cfg(sha_algo_sha_512)]
623623
impl_sha!(Sha512, 4, 64, 128);
624-
#[cfg(any(esp32s2, esp32s3))]
624+
#[cfg(sha_algo_sha_512_224)]
625625
impl_sha!(Sha512_224, 5, 28, 128);
626-
#[cfg(any(esp32s2, esp32s3))]
626+
#[cfg(sha_algo_sha_512_256)]
627627
impl_sha!(Sha512_256, 6, 32, 128);
628+
// TODO: Allow/Implement SHA512_(u16)
628629

629630
fn h_mem(sha: &crate::peripherals::SHA<'_>, index: usize) -> *mut u32 {
630631
let sha = sha.register_block();

‎esp-metadata-generated/src/_build_script_utils.rs‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -281,6 +281,10 @@ impl Chip {
281281
"rmt_ram_start=\"1073047552\"",
282282
"rmt_channel_ram_size=\"64\"",
283283
"rng_apb_cycle_wait_num=\"16\"",
284+
"sha_algo_sha_1",
285+
"sha_algo_sha_256",
286+
"sha_algo_sha_384",
287+
"sha_algo_sha_512",
284288
"timergroup_timg_has_timer1",
285289
"uart_ram_size=\"128\"",
286290
"has_dram_region",
@@ -427,6 +431,10 @@ impl Chip {
427431
"cargo:rustc-cfg=rmt_ram_start=\"1073047552\"",
428432
"cargo:rustc-cfg=rmt_channel_ram_size=\"64\"",
429433
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
434+
"cargo:rustc-cfg=sha_algo_sha_1",
435+
"cargo:rustc-cfg=sha_algo_sha_256",
436+
"cargo:rustc-cfg=sha_algo_sha_384",
437+
"cargo:rustc-cfg=sha_algo_sha_512",
430438
"cargo:rustc-cfg=timergroup_timg_has_timer1",
431439
"cargo:rustc-cfg=uart_ram_size=\"128\"",
432440
"cargo:rustc-cfg=has_dram_region",
@@ -537,6 +545,9 @@ impl Chip {
537545
"i2c_master_fifo_size=\"16\"",
538546
"interrupts_status_registers=\"2\"",
539547
"rng_apb_cycle_wait_num=\"16\"",
548+
"sha_algo_sha_1",
549+
"sha_algo_sha_224",
550+
"sha_algo_sha_256",
540551
"timergroup_timg_has_divcnt_rst",
541552
"uart_ram_size=\"128\"",
542553
"has_dram_region",
@@ -643,6 +654,9 @@ impl Chip {
643654
"cargo:rustc-cfg=i2c_master_fifo_size=\"16\"",
644655
"cargo:rustc-cfg=interrupts_status_registers=\"2\"",
645656
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
657+
"cargo:rustc-cfg=sha_algo_sha_1",
658+
"cargo:rustc-cfg=sha_algo_sha_224",
659+
"cargo:rustc-cfg=sha_algo_sha_256",
646660
"cargo:rustc-cfg=timergroup_timg_has_divcnt_rst",
647661
"cargo:rustc-cfg=uart_ram_size=\"128\"",
648662
"cargo:rustc-cfg=has_dram_region",
@@ -782,6 +796,9 @@ impl Chip {
782796
"rmt_ram_start=\"1610703872\"",
783797
"rmt_channel_ram_size=\"48\"",
784798
"rng_apb_cycle_wait_num=\"16\"",
799+
"sha_algo_sha_1",
800+
"sha_algo_sha_224",
801+
"sha_algo_sha_256",
785802
"timergroup_timg_has_divcnt_rst",
786803
"uart_ram_size=\"128\"",
787804
"has_dram_region",
@@ -917,6 +934,9 @@ impl Chip {
917934
"cargo:rustc-cfg=rmt_ram_start=\"1610703872\"",
918935
"cargo:rustc-cfg=rmt_channel_ram_size=\"48\"",
919936
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
937+
"cargo:rustc-cfg=sha_algo_sha_1",
938+
"cargo:rustc-cfg=sha_algo_sha_224",
939+
"cargo:rustc-cfg=sha_algo_sha_256",
920940
"cargo:rustc-cfg=timergroup_timg_has_divcnt_rst",
921941
"cargo:rustc-cfg=uart_ram_size=\"128\"",
922942
"cargo:rustc-cfg=has_dram_region",
@@ -1110,6 +1130,9 @@ impl Chip {
11101130
"rmt_ram_start=\"1610638336\"",
11111131
"rmt_channel_ram_size=\"48\"",
11121132
"rng_apb_cycle_wait_num=\"16\"",
1133+
"sha_algo_sha_1",
1134+
"sha_algo_sha_224",
1135+
"sha_algo_sha_256",
11131136
"timergroup_timg_has_divcnt_rst",
11141137
"uart_ram_size=\"128\"",
11151138
"lp_uart_ram_size=\"32\"",
@@ -1301,6 +1324,9 @@ impl Chip {
13011324
"cargo:rustc-cfg=rmt_ram_start=\"1610638336\"",
13021325
"cargo:rustc-cfg=rmt_channel_ram_size=\"48\"",
13031326
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
1327+
"cargo:rustc-cfg=sha_algo_sha_1",
1328+
"cargo:rustc-cfg=sha_algo_sha_224",
1329+
"cargo:rustc-cfg=sha_algo_sha_256",
13041330
"cargo:rustc-cfg=timergroup_timg_has_divcnt_rst",
13051331
"cargo:rustc-cfg=uart_ram_size=\"128\"",
13061332
"cargo:rustc-cfg=lp_uart_ram_size=\"32\"",
@@ -1472,6 +1498,9 @@ impl Chip {
14721498
"rmt_ram_start=\"1610642432\"",
14731499
"rmt_channel_ram_size=\"48\"",
14741500
"rng_apb_cycle_wait_num=\"16\"",
1501+
"sha_algo_sha_1",
1502+
"sha_algo_sha_224",
1503+
"sha_algo_sha_256",
14751504
"timergroup_timg_has_divcnt_rst",
14761505
"uart_ram_size=\"128\"",
14771506
"has_dram_region",
@@ -1637,6 +1666,9 @@ impl Chip {
16371666
"cargo:rustc-cfg=rmt_ram_start=\"1610642432\"",
16381667
"cargo:rustc-cfg=rmt_channel_ram_size=\"48\"",
16391668
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
1669+
"cargo:rustc-cfg=sha_algo_sha_1",
1670+
"cargo:rustc-cfg=sha_algo_sha_224",
1671+
"cargo:rustc-cfg=sha_algo_sha_256",
16401672
"cargo:rustc-cfg=timergroup_timg_has_divcnt_rst",
16411673
"cargo:rustc-cfg=uart_ram_size=\"128\"",
16421674
"cargo:rustc-cfg=has_dram_region",
@@ -1795,6 +1827,14 @@ impl Chip {
17951827
"rmt_ram_start=\"1061250048\"",
17961828
"rmt_channel_ram_size=\"64\"",
17971829
"rng_apb_cycle_wait_num=\"16\"",
1830+
"sha_algo_sha_1",
1831+
"sha_algo_sha_224",
1832+
"sha_algo_sha_256",
1833+
"sha_algo_sha_384",
1834+
"sha_algo_sha_512",
1835+
"sha_algo_sha_512_224",
1836+
"sha_algo_sha_512_256",
1837+
"sha_algo_sha_512_t",
17981838
"spi_master_has_octal",
17991839
"timergroup_timg_has_timer1",
18001840
"uart_ram_size=\"128\"",
@@ -1950,6 +1990,14 @@ impl Chip {
19501990
"cargo:rustc-cfg=rmt_ram_start=\"1061250048\"",
19511991
"cargo:rustc-cfg=rmt_channel_ram_size=\"64\"",
19521992
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
1993+
"cargo:rustc-cfg=sha_algo_sha_1",
1994+
"cargo:rustc-cfg=sha_algo_sha_224",
1995+
"cargo:rustc-cfg=sha_algo_sha_256",
1996+
"cargo:rustc-cfg=sha_algo_sha_384",
1997+
"cargo:rustc-cfg=sha_algo_sha_512",
1998+
"cargo:rustc-cfg=sha_algo_sha_512_224",
1999+
"cargo:rustc-cfg=sha_algo_sha_512_256",
2000+
"cargo:rustc-cfg=sha_algo_sha_512_t",
19532001
"cargo:rustc-cfg=spi_master_has_octal",
19542002
"cargo:rustc-cfg=timergroup_timg_has_timer1",
19552003
"cargo:rustc-cfg=uart_ram_size=\"128\"",
@@ -2127,6 +2175,14 @@ impl Chip {
21272175
"rmt_ram_start=\"1610704896\"",
21282176
"rmt_channel_ram_size=\"48\"",
21292177
"rng_apb_cycle_wait_num=\"16\"",
2178+
"sha_algo_sha_1",
2179+
"sha_algo_sha_224",
2180+
"sha_algo_sha_256",
2181+
"sha_algo_sha_384",
2182+
"sha_algo_sha_512",
2183+
"sha_algo_sha_512_224",
2184+
"sha_algo_sha_512_256",
2185+
"sha_algo_sha_512_t",
21302186
"spi_master_has_octal",
21312187
"timergroup_timg_has_timer1",
21322188
"uart_ram_size=\"128\"",
@@ -2300,6 +2356,14 @@ impl Chip {
23002356
"cargo:rustc-cfg=rmt_ram_start=\"1610704896\"",
23012357
"cargo:rustc-cfg=rmt_channel_ram_size=\"48\"",
23022358
"cargo:rustc-cfg=rng_apb_cycle_wait_num=\"16\"",
2359+
"cargo:rustc-cfg=sha_algo_sha_1",
2360+
"cargo:rustc-cfg=sha_algo_sha_224",
2361+
"cargo:rustc-cfg=sha_algo_sha_256",
2362+
"cargo:rustc-cfg=sha_algo_sha_384",
2363+
"cargo:rustc-cfg=sha_algo_sha_512",
2364+
"cargo:rustc-cfg=sha_algo_sha_512_224",
2365+
"cargo:rustc-cfg=sha_algo_sha_512_256",
2366+
"cargo:rustc-cfg=sha_algo_sha_512_t",
23032367
"cargo:rustc-cfg=spi_master_has_octal",
23042368
"cargo:rustc-cfg=timergroup_timg_has_timer1",
23052369
"cargo:rustc-cfg=uart_ram_size=\"128\"",
@@ -2444,6 +2508,10 @@ impl Config {
24442508
println!("cargo:rustc-check-cfg=cfg(gpio_has_bank_1)");
24452509
println!("cargo:rustc-check-cfg=cfg(gpio_remap_iomux_pin_registers)");
24462510
println!("cargo:rustc-check-cfg=cfg(i2c_master_separate_filter_config_registers)");
2511+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_1)");
2512+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_256)");
2513+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_384)");
2514+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_512)");
24472515
println!("cargo:rustc-check-cfg=cfg(timergroup_timg_has_timer1)");
24482516
println!("cargo:rustc-check-cfg=cfg(esp32c2)");
24492517
println!("cargo:rustc-check-cfg=cfg(riscv)");
@@ -2487,6 +2555,7 @@ impl Config {
24872555
println!("cargo:rustc-check-cfg=cfg(i2c_master_has_arbitration_en)");
24882556
println!("cargo:rustc-check-cfg=cfg(i2c_master_has_tx_fifo_watermark)");
24892557
println!("cargo:rustc-check-cfg=cfg(i2c_master_bus_timeout_is_exponential)");
2558+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_224)");
24902559
println!("cargo:rustc-check-cfg=cfg(timergroup_timg_has_divcnt_rst)");
24912560
println!("cargo:rustc-check-cfg=cfg(esp32c3)");
24922561
println!("cargo:rustc-check-cfg=cfg(soc_has_ds)");
@@ -2576,6 +2645,9 @@ impl Config {
25762645
println!("cargo:rustc-check-cfg=cfg(riscv_coproc_supported)");
25772646
println!("cargo:rustc-check-cfg=cfg(usb_otg)");
25782647
println!("cargo:rustc-check-cfg=cfg(aes_dma_mode_gcm)");
2648+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_512_224)");
2649+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_512_256)");
2650+
println!("cargo:rustc-check-cfg=cfg(sha_algo_sha_512_t)");
25792651
println!("cargo:rustc-check-cfg=cfg(spi_master_has_octal)");
25802652
println!("cargo:rustc-check-cfg=cfg(esp32s3)");
25812653
println!("cargo:rustc-check-cfg=cfg(soc_has_interrupt_core1)");

‎esp-metadata/devices/esp32.toml‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -587,6 +587,10 @@ support_status = "partial"
587587
ram_start = 0x3ff56800
588588
channel_ram_size = 64
589589

590+
[device.sha]
591+
support_status = "partial"
592+
algo = ["SHA-1", "SHA-256", "SHA-384", "SHA-512"]
593+
590594
[device.spi_master]
591595
support_status = "supported"
592596
instances = [
@@ -632,7 +636,6 @@ apb_cycle_wait_num = 16 # TODO
632636

633637
## Crypto
634638
[device.rsa]
635-
[device.sha]
636639

637640
## Interfaces
638641
[device.i2s]

‎esp-metadata/devices/esp32c2.toml‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -244,6 +244,10 @@ bus_timeout_is_exponential = true
244244
support_status = "partial"
245245
status_registers = 2
246246

247+
[device.sha]
248+
support_status = "partial"
249+
algo = ["SHA-1", "SHA-224", "SHA-256"]
250+
247251
[device.spi_master]
248252
support_status = "supported"
249253
instances = [
@@ -278,7 +282,6 @@ apb_cycle_wait_num = 16 # TODO
278282
## Crypto
279283
# [device.aes] Product portfolio lists AES, but TRM only has XTS_AES?
280284
[device.ecc]
281-
[device.sha]
282285

283286
## Interfaces
284287
[device.ledc]

‎esp-metadata/devices/esp32c3.toml‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,10 @@ support_status = "partial"
296296
ram_start = 0x60016400
297297
channel_ram_size = 48
298298

299+
[device.sha]
300+
support_status = "partial"
301+
algo = ["SHA-1", "SHA-224", "SHA-256"]
302+
299303
[device.spi_master]
300304
support_status = "supported"
301305
instances = [
@@ -332,7 +336,6 @@ apb_cycle_wait_num = 16 # TODO
332336

333337
## Crypto
334338
[device.rsa]
335-
[device.sha]
336339
[device.hmac]
337340

338341
## Interfaces

‎esp-metadata/devices/esp32c6.toml‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -451,6 +451,10 @@ support_status = "partial"
451451
ram_start = 0x60006400
452452
channel_ram_size = 48
453453

454+
[device.sha]
455+
support_status = "partial"
456+
algo = ["SHA-1", "SHA-224", "SHA-256"]
457+
454458
[device.spi_master]
455459
support_status = "supported"
456460
instances = [
@@ -496,7 +500,6 @@ apb_cycle_wait_num = 16 # TODO
496500
## Crypto
497501
[device.ecc]
498502
[device.rsa]
499-
[device.sha]
500503
[device.hmac]
501504

502505
## Interfaces

‎esp-metadata/devices/esp32h2.toml‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -368,6 +368,10 @@ support_status = "partial"
368368
ram_start = 0x60007400
369369
channel_ram_size = 48
370370

371+
[device.sha]
372+
support_status = "partial"
373+
algo = ["SHA-1", "SHA-224", "SHA-256"]
374+
371375
[device.spi_master]
372376
support_status = "supported"
373377
instances = [
@@ -405,7 +409,6 @@ apb_cycle_wait_num = 16 # TODO
405409
## Crypto
406410
[device.ecc]
407411
[device.rsa]
408-
[device.sha]
409412
[device.hmac]
410413

411414
## Interfaces

‎esp-metadata/devices/esp32s2.toml‎

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -411,6 +411,19 @@ support_status = "partial"
411411
ram_start = 0x3f416400
412412
channel_ram_size = 64
413413

414+
[device.sha]
415+
support_status = "partial"
416+
algo = [
417+
"SHA-1",
418+
"SHA-224",
419+
"SHA-256",
420+
"SHA-384",
421+
"SHA-512",
422+
"SHA-512/224",
423+
"SHA-512/256",
424+
"SHA-512/t",
425+
]
426+
414427
[device.spi_master]
415428
support_status = "supported"
416429
has_octal = true
@@ -461,7 +474,6 @@ apb_cycle_wait_num = 16 # TODO
461474
## Crypto
462475
[device.rsa]
463476
[device.hmac]
464-
[device.sha]
465477

466478
## Interfaces
467479
[device.i2s]

‎esp-metadata/devices/esp32s3.toml‎

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -586,6 +586,19 @@ support_status = "partial"
586586
ram_start = 0x60016800
587587
channel_ram_size = 48
588588

589+
[device.sha]
590+
support_status = "partial"
591+
algo = [
592+
"SHA-1",
593+
"SHA-224",
594+
"SHA-256",
595+
"SHA-384",
596+
"SHA-512",
597+
"SHA-512/224",
598+
"SHA-512/256",
599+
"SHA-512/t",
600+
]
601+
589602
[device.spi_master]
590603
support_status = "supported"
591604
has_octal = true
@@ -631,7 +644,6 @@ apb_cycle_wait_num = 16 # TODO
631644
## Crypto
632645
[device.rsa]
633646
[device.hmac]
634-
[device.sha]
635647

636648
## Interfaces
637649
[device.i2s]

‎esp-metadata/src/cfg.rs‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -463,7 +463,10 @@ driver_configs![
463463
ShaProperties {
464464
driver: sha,
465465
name: "SHA",
466-
properties: {}
466+
properties: {
467+
#[serde(default)]
468+
algo: Vec<String>,
469+
}
467470
},
468471
SpiMasterProperties<SpiMasterInstanceConfig> {
469472
driver: spi_master,

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