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Enable ESP32 HIL
1 parent 5370afb commit 5e33ded

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3 files changed

+13
-3
lines changed

3 files changed

+13
-3
lines changed

hil-test/tests/ecc.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//! ECC Test
22
3-
//% CHIPS: esp32c2 esp32c6 esp32h2
3+
//% CHIPS: esp32 esp32c2 esp32c6 esp32h2
44

55
#![no_std]
66
#![no_main]

hil-test/tests/gpio.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,10 @@
1313
use core::cell::RefCell;
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1515
use critical_section::Mutex;
16+
#[cfg(feature = "esp32")]
17+
use esp_hal::gpio::Gpio0;
18+
#[cfg(not(feature = "esp32"))]
19+
use esp_hal::gpio::Gpio3;
1620
use esp_hal::{
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delay::Delay,
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gpio::{AnyPin, GpioPin, Input, Io, Level, Output, Pull},

hil-test/tests/rmt.rs

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -59,11 +59,16 @@ mod tests {
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};
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6161
cfg_if::cfg_if! {
62-
if #[cfg(any(feature = "esp32", feature = "esp32s2"))] {
62+
if #[cfg(feature = "esp32")] {
6363
let rx_channel = {
6464
use esp_hal::rmt::RxChannelCreator;
6565
rmt.channel1.configure(rx, rx_config).unwrap()
6666
};
67+
} else if #[cfg(feature = "esp32s2")] {
68+
let rx_channel = {
69+
use esp_hal::rmt::RxChannelCreator;
70+
rmt.channel1.configure(io.pins.gpio3, rx_config).unwrap()
71+
};
6772
} else if #[cfg(feature = "esp32s3")] {
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let rx_channel = {
6974
use esp_hal::rmt::RxChannelCreator;
@@ -102,7 +107,8 @@ mod tests {
102107
let rx_transaction = rx_channel.receive(&mut rcv_data).unwrap();
103108
let tx_transaction = tx_channel.transmit(&tx_data);
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tx_transaction.wait().unwrap();
105-
rx_transaction.wait().unwrap();
110+
111+
rx_transaction.wait().unwrap(); // HERE ESP32 hangs
106112

107113
// the last two pulse-codes are the ones which wait for the timeout so they
108114
// can't be equal

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