6969use core:: marker:: PhantomData ;
7070
7171use super :: Error ;
72- #[ cfg( timg1 ) ]
72+ #[ cfg( timergroup_timg1 ) ]
7373use crate :: peripherals:: TIMG1 ;
7474#[ cfg( any( esp32c6, esp32h2) ) ]
7575use crate :: soc:: constants:: TIMG_DEFAULT_CLK_SRC ;
@@ -84,21 +84,21 @@ use crate::{
8484 time:: { Duration , Instant , Rate } ,
8585} ;
8686
87- const NUM_TIMG : usize = 1 + cfg ! ( timg1 ) as usize ;
87+ const NUM_TIMG : usize = 1 + cfg ! ( timergroup_timg1 ) as usize ;
8888
8989cfg_if:: cfg_if! {
9090 // We need no locks when a TIMG has a single timer, and we don't need locks for ESP32
9191 // and S2 where the effective interrupt enable register (config) is not shared between
9292 // the timers.
93- if #[ cfg( all( timg_timer1 , not( any( esp32, esp32s2) ) ) ) ] {
93+ if #[ cfg( all( timergroup_timg_has_timer1 , not( any( esp32, esp32s2) ) ) ) ] {
9494 use crate :: sync:: { lock, RawMutex } ;
9595 static INT_ENA_LOCK : [ RawMutex ; NUM_TIMG ] = [ const { RawMutex :: new( ) } ; NUM_TIMG ] ;
9696 }
9797}
9898
9999/// A timer group consisting of
100- #[ cfg_attr( not( timg_timer1 ) , doc = "a general purpose timer" ) ]
101- #[ cfg_attr( timg_timer1 , doc = "2 timers" ) ]
100+ #[ cfg_attr( not( timergroup_timg_has_timer1 ) , doc = "a general purpose timer" ) ]
101+ #[ cfg_attr( timergroup_timg_has_timer1 , doc = "2 timers" ) ]
102102/// and a watchdog timer.
103103pub struct TimerGroup < ' d , T >
104104where
@@ -108,7 +108,7 @@ where
108108 /// Timer 0
109109 pub timer0 : Timer < ' d > ,
110110 /// Timer 1
111- #[ cfg( timg_timer1 ) ]
111+ #[ cfg( timergroup_timg_has_timer1 ) ]
112112 pub timer1 : Timer < ' d > ,
113113 /// Watchdog timer
114114 pub wdt : Wdt < T > ,
@@ -125,6 +125,7 @@ pub trait TimerGroupInstance {
125125 fn wdt_interrupt ( ) -> Interrupt ;
126126}
127127
128+ #[ cfg( timergroup_timg0) ]
128129impl TimerGroupInstance for TIMG0 < ' _ > {
129130 fn id ( ) -> u8 {
130131 0
@@ -186,7 +187,7 @@ impl TimerGroupInstance for TIMG0<'_> {
186187 }
187188}
188189
189- #[ cfg( timg1 ) ]
190+ #[ cfg( timergroup_timg1 ) ]
190191impl TimerGroupInstance for crate :: peripherals:: TIMG1 < ' _ > {
191192 fn id ( ) -> u8 {
192193 1
@@ -262,7 +263,7 @@ where
262263 register_block : T :: register_block ( ) ,
263264 _lifetime : PhantomData ,
264265 } ,
265- #[ cfg( timg_timer1 ) ]
266+ #[ cfg( timergroup_timg_has_timer1 ) ]
266267 timer1 : Timer {
267268 timer : 1 ,
268269 tg : T :: id ( ) ,
@@ -325,11 +326,11 @@ impl super::Timer for Timer<'_> {
325326 fn async_interrupt_handler ( & self ) -> InterruptHandler {
326327 match ( self . timer_group ( ) , self . timer_number ( ) ) {
327328 ( 0 , 0 ) => asynch:: timg0_timer0_handler,
328- #[ cfg( timg_timer1 ) ]
329+ #[ cfg( timergroup_timg_has_timer1 ) ]
329330 ( 0 , 1 ) => asynch:: timg0_timer1_handler,
330- #[ cfg( timg1 ) ]
331+ #[ cfg( timergroup_timg1 ) ]
331332 ( 1 , 0 ) => asynch:: timg1_timer0_handler,
332- #[ cfg( all( timg_timer1 , timg1 ) ) ]
333+ #[ cfg( all( timergroup_timg_has_timer1 , timergroup_timg1 ) ) ]
333334 ( 1 , 1 ) => asynch:: timg1_timer1_handler,
334335 _ => unreachable ! ( ) ,
335336 }
@@ -338,11 +339,11 @@ impl super::Timer for Timer<'_> {
338339 fn peripheral_interrupt ( & self ) -> Interrupt {
339340 match ( self . timer_group ( ) , self . timer_number ( ) ) {
340341 ( 0 , 0 ) => Interrupt :: TG0_T0_LEVEL ,
341- #[ cfg( timg_timer1 ) ]
342+ #[ cfg( timergroup_timg_has_timer1 ) ]
342343 ( 0 , 1 ) => Interrupt :: TG0_T1_LEVEL ,
343- #[ cfg( timg1 ) ]
344+ #[ cfg( timergroup_timg1 ) ]
344345 ( 1 , 0 ) => Interrupt :: TG1_T0_LEVEL ,
345- #[ cfg( all( timg_timer1 , timg1 ) ) ]
346+ #[ cfg( all( timergroup_timg_has_timer1 , timergroup_timg1 ) ) ]
346347 ( 1 , 1 ) => Interrupt :: TG1_T1_LEVEL ,
347348 _ => unreachable ! ( ) ,
348349 }
@@ -398,11 +399,11 @@ impl Timer<'_> {
398399 pub ( crate ) fn set_interrupt_handler ( & self , handler : InterruptHandler ) {
399400 let interrupt = match ( self . timer_group ( ) , self . timer_number ( ) ) {
400401 ( 0 , 0 ) => Interrupt :: TG0_T0_LEVEL ,
401- #[ cfg( timg_timer1 ) ]
402+ #[ cfg( timergroup_timg_has_timer1 ) ]
402403 ( 0 , 1 ) => Interrupt :: TG0_T1_LEVEL ,
403- #[ cfg( timg1 ) ]
404+ #[ cfg( timergroup_timg1 ) ]
404405 ( 1 , 0 ) => Interrupt :: TG1_T0_LEVEL ,
405- #[ cfg( all( timg_timer1 , timg1 ) ) ]
406+ #[ cfg( all( timergroup_timg_has_timer1 , timergroup_timg1 ) ) ]
406407 ( 1 , 1 ) => Interrupt :: TG1_T1_LEVEL ,
407408 _ => unreachable ! ( ) ,
408409 } ;
@@ -560,7 +561,7 @@ impl Timer<'_> {
560561 . t( self . timer as usize )
561562 . config( )
562563 . modify( |_, w| w. level_int_en( ) . bit( state) ) ;
563- } else if #[ cfg( timg_timer1 ) ] {
564+ } else if #[ cfg( timergroup_timg_has_timer1 ) ] {
564565 lock( & INT_ENA_LOCK [ self . timer_group( ) as usize ] , || {
565566 self . register_block( )
566567 . int_ena( )
@@ -828,7 +829,7 @@ mod asynch {
828829 use crate :: asynch:: AtomicWaker ;
829830
830831 const NUM_WAKERS : usize = {
831- let timer_per_group = 1 + cfg ! ( timg_timer1 ) as usize ;
832+ let timer_per_group = 1 + cfg ! ( timergroup_timg_has_timer1 ) as usize ;
832833 NUM_TIMG * timer_per_group
833834 } ;
834835
@@ -859,7 +860,7 @@ mod asynch {
859860 } ) ;
860861 }
861862
862- #[ cfg( timg1 ) ]
863+ #[ cfg( timergroup_timg1 ) ]
863864 #[ handler]
864865 pub ( crate ) fn timg1_timer0_handler ( ) {
865866 handle_irq ( Timer {
@@ -870,7 +871,7 @@ mod asynch {
870871 } ) ;
871872 }
872873
873- #[ cfg( timg_timer1 ) ]
874+ #[ cfg( timergroup_timg_has_timer1 ) ]
874875 #[ handler]
875876 pub ( crate ) fn timg0_timer1_handler ( ) {
876877 handle_irq ( Timer {
@@ -881,7 +882,7 @@ mod asynch {
881882 } ) ;
882883 }
883884
884- #[ cfg( all( timg1 , timg_timer1 ) ) ]
885+ #[ cfg( all( timergroup_timg1 , timergroup_timg_has_timer1 ) ) ]
885886 #[ handler]
886887 pub ( crate ) fn timg1_timer1_handler ( ) {
887888 handle_irq ( Timer {
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