fix SPI detection on s3 by using the right base address (#917)

Author: MabezDev

espflash/src/target/mod.rs

@@ -844,12 +844,7 @@ impl Chip {
                 mosi_length_offset: Some(0x28),
                 miso_length_offset: Some(0x2c),
             },
-            Chip::Esp32c2
-            | Chip::Esp32c3
-            | Chip::Esp32c5
-            | Chip::Esp32c6
-            | Chip::Esp32h2
-            | Chip::Esp32s3 => SpiRegisters {
+            Chip::Esp32c5 | Chip::Esp32c6 | Chip::Esp32h2 => SpiRegisters {
                 base: 0x6000_3000,
                 usr_offset: 0x18,
                 usr1_offset: 0x1c,
@@ -858,6 +853,15 @@ impl Chip {
                 mosi_length_offset: Some(0x24),
                 miso_length_offset: Some(0x28),
             },
+            Chip::Esp32c2 | Chip::Esp32c3 | Chip::Esp32s3 => SpiRegisters {
+                base: 0x6000_2000,
+                usr_offset: 0x18,
+                usr1_offset: 0x1c,
+                usr2_offset: 0x20,
+                w0_offset: 0x58,
+                mosi_length_offset: Some(0x24),
+                miso_length_offset: Some(0x28),
+            },
             Chip::Esp32p4 => SpiRegisters {
                 base: 0x5008_D000,
                 usr_offset: 0x18,