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MabezDevfmckeogh
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The xtensa triples are recognized by the compiler. Need to implement the calling convention, target -> call -> abi
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3 files changed

+18
-1
lines changed

3 files changed

+18
-1
lines changed

src/librustc_llvm/build.rs

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@@ -72,7 +72,7 @@ fn main() {
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let mut optional_components =
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vec!["x86", "arm", "aarch64", "amdgpu", "mips", "powerpc",
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"systemz", "jsbackend", "webassembly", "msp430", "sparc", "nvptx",
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"hexagon"];
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"hexagon", "xtensa"];
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let mut version_cmd = Command::new(&llvm_config);
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version_cmd.arg("--version");

src/librustc_llvm/lib.rs

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@@ -105,4 +105,12 @@ pub fn initialize_available_targets() {
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LLVMInitializeWebAssemblyTarget,
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LLVMInitializeWebAssemblyTargetMC,
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LLVMInitializeWebAssemblyAsmPrinter);
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init_target!(llvm_component = "xtensa",
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LLVMInitializeXtensaTargetInfo,
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LLVMInitializeXtensaTarget,
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LLVMInitializeXtensaTargetMC,
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LLVMInitializeXtensaAsmPrinter
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LLVMInitializeXtensaAsmParser);
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);
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}

src/rustllvm/PassWrapper.cpp

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@@ -174,6 +174,14 @@ void LLVMRustAddLastExtensionPasses(
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#define SUBTARGET_HEXAGON
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#endif
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#ifdef LLVM_COMPONENT_XTENSA
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#define SUBTARGET_XTENSA SUBTARGET(XTENSA)
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#else
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#define SUBTARGET_XTENSA
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#endif
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#define GEN_SUBTARGETS \
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SUBTARGET_X86 \
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SUBTARGET_ARM \
@@ -185,6 +193,7 @@ void LLVMRustAddLastExtensionPasses(
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SUBTARGET_SPARC \
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SUBTARGET_HEXAGON \
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SUBTARGET_RISCV \
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SUBTARGET_XTENSA \
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#define SUBTARGET(x) \
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namespace llvm { \

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