Add some no_std Xtensa targets

ESP32, ESP32S2, ESP32S3 & ESP8266.

Author: MabezDev

compiler/rustc_target/src/spec/mod.rs

@@ -91,6 +91,7 @@ mod windows_gnullvm_base;
 mod windows_msvc_base;
 mod windows_uwp_gnu_base;
 mod windows_uwp_msvc_base;
+mod xtensa_base;
 
 /// Linker is called through a C/C++ compiler.
 #[derive(Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd)]
@@ -1447,6 +1448,11 @@ supported_targets! {
 
     ("nvptx64-nvidia-cuda", nvptx64_nvidia_cuda),
 
+    ("xtensa-esp32-none-elf", xtensa_esp32_none_elf),
+    ("xtensa-esp32s2-none-elf", xtensa_esp32s2_none_elf),
+    ("xtensa-esp8266-none-elf", xtensa_esp8266_none_elf),
+    ("xtensa-esp32s3-none-elf", xtensa_esp32s3_none_elf),
+
     ("i686-wrs-vxworks", i686_wrs_vxworks),
     ("x86_64-wrs-vxworks", x86_64_wrs_vxworks),
     ("armv7-wrs-vxworks-eabihf", armv7_wrs_vxworks_eabihf),

compiler/rustc_target/src/spec/xtensa_base.rs

@@ -0,0 +1,17 @@
+use crate::spec::{LinkerFlavor, Cc, PanicStrategy, RelocModel, TargetOptions, Lld};
+use crate::abi::Endian;
+
+pub fn opts() -> TargetOptions {
+    TargetOptions {
+        os: "none".into(),
+        endian: Endian::Little,
+        c_int_width: "32".into(),
+        linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
+        executables: true,
+        panic_strategy: PanicStrategy::Abort,
+        relocation_model: RelocModel::Static,
+        emit_debug_gdb_scripts: false,
+        atomic_cas: false,
+        ..Default::default()
+    }
+}

compiler/rustc_target/src/spec/xtensa_esp32_none_elf.rs

@@ -0,0 +1,18 @@
+use crate::spec::{Target, TargetOptions};
+
+pub fn target() -> Target {
+    Target {
+        llvm_target: "xtensa-none-elf".into(),
+        pointer_width: 32,
+        data_layout: "e-m:e-p:32:32-i64:64-i128:128-n32".into(),
+        arch: "xtensa".into(),
+        
+        options: TargetOptions {
+            cpu: "esp32".into(),
+            linker: Some("xtensa-esp32-elf-gcc".into()),
+            max_atomic_width: Some(32),
+            atomic_cas: true,
+            ..super::xtensa_base::opts()
+        },
+    }
+}

compiler/rustc_target/src/spec/xtensa_esp32s2_none_elf.rs

@@ -0,0 +1,17 @@
+use crate::spec::{Target, TargetOptions};
+
+pub fn target() -> Target {
+    Target {
+        llvm_target: "xtensa-none-elf".into(),
+        pointer_width: 32,
+        data_layout: "e-m:e-p:32:32-i64:64-i128:128-n32".into(),
+        arch: "xtensa".into(),
+        
+        options: TargetOptions {
+            cpu: "esp32-s2".into(),
+            linker: Some("xtensa-esp32s2-elf-gcc".into()),
+            max_atomic_width: Some(32),
+            ..super::xtensa_base::opts()
+        },
+    }
+}

compiler/rustc_target/src/spec/xtensa_esp32s3_none_elf.rs

@@ -0,0 +1,18 @@
+use crate::spec::{Target, TargetOptions};
+
+pub fn target() -> Target {
+    Target {
+        llvm_target: "xtensa-none-elf".into(),
+        pointer_width: 32,
+        data_layout: "e-m:e-p:32:32-i64:64-i128:128-n32".into(),
+        arch: "xtensa".into(),
+        
+        options: TargetOptions {
+            cpu: "esp32-s3".into(),
+            linker: Some("xtensa-esp32s3-elf-gcc".into()),
+            max_atomic_width: Some(32),
+            atomic_cas: true,
+            ..super::xtensa_base::opts()
+        },
+    }
+}

compiler/rustc_target/src/spec/xtensa_esp8266_none_elf.rs

@@ -0,0 +1,17 @@
+use crate::spec::{Target, TargetOptions};
+
+pub fn target() -> Target {
+    Target {
+        llvm_target: "xtensa-none-elf".into(),
+        pointer_width: 32,
+        data_layout: "e-m:e-p:32:32-i64:64-i128:128-n32".into(),
+        arch: "xtensa".into(),
+        
+        options: TargetOptions {
+            cpu: "esp8266".into(),
+            linker: Some("xtensa-lx106-elf-gcc".into()),
+            max_atomic_width: Some(32),
+            ..super::xtensa_base::opts()
+        },
+    }
+}