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Always arm the "TX FIFO Empty" interrupt after we write into _tx_buffer.
This avoids a race where the interrupt handler detects an empty _tx_buffer just before we write data into it. Note that commit d6f6294 works around this race when data is continually added to _tx_buffer in the hung state. We revert that change here as the race should no longer occur. Testing performed: - set UART_CONF1.txfifo_empty_thrhd=0x70 (which exacerbates the issue) - generate a ~240 byte burst of data, sent in back-to-back Serial1.write(, 4) calls, optionally followed by a Serial1.flush() Test results: - before this change, observe occasional unsent data and hang in flush() (if used). - after this change, data is sent as expected.
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cores/esp8266/HardwareSerial.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -617,18 +617,15 @@ size_t HardwareSerial::write(uint8_t c) {
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size_t room = uart_get_tx_fifo_room(_uart);
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if(room > 0 && _tx_buffer->empty()) {
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uart_transmit_char(_uart, c);
620-
if(room < 10) {
621-
uart_arm_tx_interrupt(_uart);
622-
}
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return 1;
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}
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while(_tx_buffer->room() == 0) {
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yield();
628-
uart_arm_tx_interrupt(_uart);
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}
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631627
_tx_buffer->write(c);
628+
uart_arm_tx_interrupt(_uart);
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return 1;
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}
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