@@ -41,6 +41,7 @@ extern "C" {
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#include " hal/spi_flash_ll.h"
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#if !CONFIG_IDF_TARGET_ESP32
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#include " hal/spimem_flash_ll.h"
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+ #include " soc/spi_mem_struct.h"
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#endif
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#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
@@ -543,11 +544,12 @@ uint8_t EspClass::getFlashSourceFrequencyMHz(void) {
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}
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/* *
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- * @brief Read the clock divider from hardware
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+ * @brief Read the clock divider from hardware using HAL structures
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* @return Clock divider value (1 = no division, 2 = divide by 2, etc.)
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*/
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uint8_t EspClass::getFlashClockDivider (void ) {
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- // Read CLOCK register using DR_REG_SPI0_BASE from soc/soc.h
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+ #if CONFIG_IDF_TARGET_ESP32
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+ // ESP32 classic: Read CLOCK register directly (no SPIMEM structure available)
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volatile uint32_t * clock_reg = (volatile uint32_t *)(DR_REG_SPI0_BASE + 0x14 );
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uint32_t clock_val = *clock_reg;
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@@ -559,6 +561,13 @@ uint8_t EspClass::getFlashClockDivider(void) {
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// Bits 16-23: clkdiv_pre
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uint8_t clkdiv_pre = (clock_val >> 16 ) & 0xFF ;
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return clkdiv_pre + 1 ;
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+ #else
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+ // Modern chips (S2, S3, C2, C3, C5, C6, H2, P4): Use SPIMEM0 structure
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+ if (SPIMEM0.clock .clk_equ_sysclk ) {
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+ return 1 ; // 1:1 clock (no divider)
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+ }
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+ return SPIMEM0.clock .clkcnt_n + 1 ;
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+ #endif
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}
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/* *
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