Merge branch 'feature/support_efuse_esp32c5_eco2' into 'master'

feat(efuse): Support efuses for ESP32-C5 ECO2

Closes IDF-12854

See merge request espressif/esp-idf!38925

Author: Konstantin Kondrashov

components/efuse/esp32c5/esp_efuse_table.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -62,7 +62,10 @@ typedef enum {
  */
 typedef enum {
     ESP_EFUSE_KEY_PURPOSE_USER = 0,                         /**< User purposes (software-only use) */
-    ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY = 1,                    /**< ECDSA private key (Expected in little endian order)*/
+    ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY = 1,                    /**< ECDSA private key (P256) (Expected in little endian order)*/
+    ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P256 = ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY, /**< ECDSA private key (P256) (Expected in little endian order)*/
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,            /**< XTS_AES_256_KEY_1 (flash/PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,            /**< XTS_AES_256_KEY_2 (flash/PSRAM encryption) */
     ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,              /**< XTS_AES_128_KEY (flash/PSRAM encryption) */
     ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,                /**< HMAC Downstream mode */
     ESP_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,               /**< JTAG soft enable key (uses HMAC Downstream mode) */
@@ -71,6 +74,13 @@ typedef enum {
     ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,          /**< SECURE_BOOT_DIGEST0 (Secure Boot key digest) */
     ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,         /**< SECURE_BOOT_DIGEST1 (Secure Boot key digest) */
     ESP_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,         /**< SECURE_BOOT_DIGEST2 (Secure Boot key digest) */
+    ESP_EFUSE_KEY_PURPOSE_KM_INIT_KEY = 12,                 /**< KM_INIT_KEY (Key Manager initialization key) */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_1 = 13,     /**< XTS_AES_256_PSRAM_KEY_1 (PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_2 = 14,     /**< XTS_AES_256_PSRAM_KEY_2 (PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_PSRAM_KEY = 15,       /**< XTS_AES_128_PSRAM_KEY (PSRAM encryption) */
+    ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P192 = 16,              /**< ECDSA private key (P192) */
+    ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_L = 17,            /**< ECDSA private key (P384) */
+    ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_H = 18,            /**< ECDSA private key (P384) */
     ESP_EFUSE_KEY_PURPOSE_MAX,                              /**< MAX PURPOSE */
 } esp_efuse_purpose_t;
 

components/efuse/esp32c5/esp_efuse_table.csv

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,7 +10,7 @@ extern "C" {
 
 #include "esp_efuse.h"
 
-// md5_digest_table b26e7466c400977081a142076ef1a5bb
+// md5_digest_table 0c453d200f282e320677c1ac46786658
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -55,7 +55,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_5[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SEC_DPA_LEVEL[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_XTS_DPA_PSEUDO_LEVEL[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_XTS_DPA_CLK_ENABLE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ECDSA_DISABLE_P192[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_SHA384_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ECC_FORCE_CONST_TIME[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[];
@@ -99,6 +99,8 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LSLP_HP_DBIAS[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_LP_DBG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_LP_DBIAS[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LP_HP_DBIAS_VOL_GAP[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_REF_CURR_CODE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RES_TUNE_CODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OPTIONAL_UNIQUE_ID[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_TEMPERATURE_SENSOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OCODE[];
@@ -153,8 +155,10 @@ extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY5[];
 #define ESP_EFUSE_RD_DIS_KEY5 ESP_EFUSE_RD_DIS_BLOCK_KEY5
 extern const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_SYS_DATA2[];
 #define ESP_EFUSE_RD_DIS_SYS_DATA_PART2 ESP_EFUSE_RD_DIS_BLOCK_SYS_DATA2
+extern const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SPI_DOWNLOAD_MSPI_DIS[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_TWAI[];
@@ -164,12 +168,14 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[];
 extern const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[];
 extern const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KM_DISABLE_DEPLOY_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KM_RND_SWITCH_CYCLE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KM_DEPLOY_ONLY_ONCE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_USE_KEY_MANAGER_KEY[];
 extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_DISABLE_SW_INIT_KEY[];
-extern const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[];
@@ -187,6 +193,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[];
 #define ESP_EFUSE_KEY5_PURPOSE ESP_EFUSE_KEY_PURPOSE_5
 extern const esp_efuse_desc_t* ESP_EFUSE_SEC_DPA_LEVEL[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RECOVERY_BOOTLOADER_FLASH_SECTOR_HI[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_KM_XTS_KEY_LENGTH_256[];
@@ -204,11 +211,12 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_DISABLE_FAST_WAKE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_HYS_EN_PAD[];
 extern const esp_efuse_desc_t* ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[];
 extern const esp_efuse_desc_t* ESP_EFUSE_XTS_DPA_CLK_ENABLE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_SHA384_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_HUK_GEN_STATE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_XTAL_48M_SEL[];
 extern const esp_efuse_desc_t* ESP_EFUSE_XTAL_48M_SEL_MODE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_ECDSA_DISABLE_P192[];
 extern const esp_efuse_desc_t* ESP_EFUSE_ECC_FORCE_CONST_TIME[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RECOVERY_BOOTLOADER_FLASH_SECTOR_LO[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC[];
 #define ESP_EFUSE_MAC_FACTORY ESP_EFUSE_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[];
@@ -234,6 +242,8 @@ extern const esp_efuse_desc_t* ESP_EFUSE_LSLP_HP_DBIAS[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DSLP_LP_DBG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DSLP_LP_DBIAS[];
 extern const esp_efuse_desc_t* ESP_EFUSE_LP_HP_DBIAS_VOL_GAP[];
+extern const esp_efuse_desc_t* ESP_EFUSE_REF_CURR_CODE[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RES_TUNE_CODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[];
 extern const esp_efuse_desc_t* ESP_EFUSE_TEMPERATURE_SENSOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_OCODE[];

components/efuse/esp32c5/include/esp_efuse_chip.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -308,6 +308,20 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
 #if SOC_EFUSE_ECDSA_KEY
             purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
 #endif
+#if SOC_EFUSE_ECDSA_KEY_P192
+            purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P192 ||
+#endif
+#if SOC_EFUSE_ECDSA_KEY_P384
+            purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_L ||
+            purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY_P384_H ||
+#endif
+#if SOC_PSRAM_ENCRYPTION_XTS_AES_128
+            purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_PSRAM_KEY ||
+#endif
+#if SOC_PSRAM_ENCRYPTION_XTS_AES_256
+            purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_1 ||
+            purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_PSRAM_KEY_2 ||
+#endif
 #if SOC_KEY_MANAGER_SUPPORTED
             purpose == ESP_EFUSE_KEY_PURPOSE_KM_INIT_KEY ||
 #endif

components/efuse/esp32c5/include/esp_efuse_table.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -11,6 +11,8 @@
 #include "hal/efuse_hal.h"
 #include "esp_attr.h"
 
+#define FLASH_SECTOR_SIZE (4096)
+
 
 void efuse_hal_get_mac(uint8_t *mac)
 {
@@ -66,3 +68,20 @@ void efuse_hal_set_ecdsa_key(ecdsa_curve_t curve, int efuse_blk)
     efuse_hal_read();
 }
 #endif
+
+#if SOC_RECOVERY_BOOTLOADER_SUPPORTED
+uint32_t efuse_hal_get_recovery_bootloader_address(void)
+{
+    return efuse_ll_get_recovery_bootloader_sector() * FLASH_SECTOR_SIZE;
+}
+
+uint32_t efuse_hal_convert_recovery_bootloader_address_to_flash_sectors(uint32_t address)
+{
+    return address / FLASH_SECTOR_SIZE;
+}
+
+bool efuse_hal_recovery_bootloader_enabled(void)
+{
+    return EFUSE_RECOVERY_BOOTLOADER_ENABLED(efuse_ll_get_recovery_bootloader_sector());
+}
+#endif // SOC_RECOVERY_BOOTLOADER_SUPPORTED

components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c

@@ -149,6 +149,11 @@ __attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(
     return EFUSE.rd_mac_sys4.lp_hp_dbias_vol_gap;
 }
 
+__attribute__((always_inline)) static inline uint32_t efuse_ll_get_recovery_bootloader_sector(void)
+{
+    return (EFUSE.rd_repeat_data2.recovery_bootloader_flash_sector_hi << 9) | EFUSE.rd_repeat_data4.recovery_bootloader_flash_sector_lo;
+}
+
 /******************* eFuse control functions *************************/
 
 __attribute__((always_inline)) static inline bool efuse_ll_get_read_cmd(void)

components/hal/efuse_hal.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -87,6 +87,37 @@ uint32_t efuse_hal_get_chip_ver_pkg(void);
 void efuse_hal_set_ecdsa_key(ecdsa_curve_t curve, int efuse_key_blk);
 #endif
 
+#if SOC_RECOVERY_BOOTLOADER_SUPPORTED
+
+#define EFUSE_RECOVERY_BOOTLOADER_FLASH_SECTOR_LEN (12)
+#define EFUSE_RECOVERY_BOOTLOADER_ENABLED(sector) ((sector) != 0 && (sector) != ((1 << EFUSE_RECOVERY_BOOTLOADER_FLASH_SECTOR_LEN) - 1))
+
+/**
+ * @brief Returns recovery bootloader flash address
+ *
+ * @return Recovery bootloader flash address.
+ */
+uint32_t efuse_hal_get_recovery_bootloader_address(void);
+
+/**
+ * @brief Converts a recovery bootloader address to the corresponding flash sector.
+ *
+ * This function translates a recovery bootloader address in bytes
+ * into the equivalent flash sector number.
+ *
+ * @param address The recovery bootloader address in bytes.
+ * @return The flash sector number corresponding to the given address.
+ */
+uint32_t efuse_hal_convert_recovery_bootloader_address_to_flash_sectors(uint32_t address);
+
+/**
+ * @brief Returns true if recovery bootloader address is configured
+ *
+ * @return True - Recovery bootloader address is configured.
+ */
+bool efuse_hal_recovery_bootloader_enabled(void);
+#endif // SOC_RECOVERY_BOOTLOADER_SUPPORTED
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c5/include/hal/efuse_ll.h

@@ -1323,10 +1323,38 @@ config SOC_TWAI_SUPPORT_TIMESTAMP
     bool
     default y
 
+config SOC_EFUSE_DIS_PAD_JTAG
+    bool
+    default y
+
+config SOC_EFUSE_DIS_USB_JTAG
+    bool
+    default y
+
+config SOC_EFUSE_DIS_DIRECT_BOOT
+    bool
+    default y
+
+config SOC_EFUSE_SOFT_DIS_JTAG
+    bool
+    default y
+
+config SOC_EFUSE_DIS_ICACHE
+    bool
+    default y
+
 config SOC_EFUSE_ECDSA_KEY
     bool
     default y
 
+config SOC_EFUSE_ECDSA_KEY_P192
+    bool
+    default y
+
+config SOC_EFUSE_ECDSA_KEY_P384
+    bool
+    default y
+
 config SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
     bool
     default y
@@ -1367,10 +1395,30 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
     bool
     default y
 
+config SOC_FLASH_ENCRYPTION_XTS_AES_256
+    bool
+    default y
+
 config SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND
     bool
     default y
 
+config SOC_PSRAM_ENCRYPTION_XTS_AES_128
+    bool
+    default y
+
+config SOC_PSRAM_ENCRYPTION_XTS_AES_256
+    bool
+    default y
+
+config SOC_RECOVERY_BOOTLOADER_SUPPORTED
+    bool
+    default n
+
+config SOC_BOOTLOADER_ANTI_ROLLBACK_SUPPORTED
+    bool
+    default n
+
 config SOC_APM_CTRL_FILTER_SUPPORTED
     bool
     default y

components/hal/include/hal/efuse_hal.h

@@ -519,13 +519,15 @@
 #define SOC_TWAI_SUPPORT_TIMESTAMP      1
 
 /*-------------------------- eFuse CAPS----------------------------*/
-// #define SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1
-// #define SOC_EFUSE_DIS_PAD_JTAG 1
-// #define SOC_EFUSE_DIS_USB_JTAG 1
-// #define SOC_EFUSE_DIS_DIRECT_BOOT 1
-// #define SOC_EFUSE_SOFT_DIS_JTAG 1
-// #define SOC_EFUSE_DIS_ICACHE 1
+#define SOC_EFUSE_DIS_PAD_JTAG 1
+#define SOC_EFUSE_DIS_USB_JTAG 1
+#define SOC_EFUSE_DIS_DIRECT_BOOT 1
+#define SOC_EFUSE_SOFT_DIS_JTAG 1
+#define SOC_EFUSE_DIS_ICACHE 1
+// ECDSA_P256_KEY
 #define SOC_EFUSE_ECDSA_KEY 1
+#define SOC_EFUSE_ECDSA_KEY_P192 1
+#define SOC_EFUSE_ECDSA_KEY_P384 1
 
 /*-------------------------- Key Manager CAPS----------------------------*/
 #define SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY    1 /*!< Key manager responsible to deploy ECDSA key */
@@ -542,8 +544,19 @@
 #define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX   (64)
 #define SOC_FLASH_ENCRYPTION_XTS_AES        1
 #define SOC_FLASH_ENCRYPTION_XTS_AES_128    1
+#define SOC_FLASH_ENCRYPTION_XTS_AES_256    1
 #define SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND  1
 
+/*-------------------------- PSRAM Encryption CAPS----------------------------*/
+#define SOC_PSRAM_ENCRYPTION_XTS_AES_128    (1)
+#define SOC_PSRAM_ENCRYPTION_XTS_AES_256    (1)
+
+/*------------------------Bootloader CAPS---------------------------------*/
+/* Support Recovery Bootloader */
+#define SOC_RECOVERY_BOOTLOADER_SUPPORTED             (0)
+/* Support Anti-rollback */
+#define SOC_BOOTLOADER_ANTI_ROLLBACK_SUPPORTED        (0)
+
 /*-------------------------- APM CAPS-----------------------------------------*/
 #define SOC_APM_CTRL_FILTER_SUPPORTED   1 /*!< Support for APM control filter */
 #define SOC_APM_LP_APM0_SUPPORTED       1 /*!< Support for LP APM0 control filter */