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Icarus113Icarus113
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test(sd): added SD NG driver allocation tests
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4 files changed

+128
-7
lines changed

4 files changed

+128
-7
lines changed

‎components/esp_driver_sdio/test_apps/sdio/sdio_common_tests/pytest_sdio.py‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -105,12 +105,12 @@ def test_sdio_speed_frhost_flow(dut: Tuple[IdfDut, IdfDut], expected_4b_speed: i
105105
dut[0].write('"SDIO_SDMMC: test from host (Performance)"')
106106

107107
dut[0].expect('Probe using SD 4-bit')
108-
res = dut[0].expect(r'Throughput: compensated (\d+)')
108+
res = dut[0].expect(r'Throughput: compensated (\d+)KB\/s')
109109
frhost_speed_4bit = res.group(1).decode('utf8')
110110
assert int(frhost_speed_4bit) > expected_4b_speed
111111

112112
dut[0].expect('Probe using SD 1-bit')
113-
res = dut[0].expect(r'Throughput: compensated (\d+)')
113+
res = dut[0].expect(r'Throughput: compensated (\d+)KB\/s')
114114
frhost_speed_1bit = res.group(1).decode('utf8')
115115
assert int(frhost_speed_1bit) > expected_1b_speed
116116

@@ -164,12 +164,12 @@ def test_sdio_speed_tohost_flow(dut: Tuple[IdfDut, IdfDut], expected_4b_speed: i
164164
dut[0].write('"SDIO_SDMMC: test to host (Performance)"')
165165

166166
dut[0].expect('Probe using SD 4-bit')
167-
res = dut[0].expect(r'Throughput: compensated (\d+)')
167+
res = dut[0].expect(r'Throughput: compensated (\d+)KB\/s')
168168
tohost_speed_4bit = res.group(1).decode('utf8')
169169
assert int(tohost_speed_4bit) > expected_4b_speed
170170

171171
dut[0].expect('Probe using SD 1-bit')
172-
res = dut[0].expect(r'Throughput: compensated (\d+)')
172+
res = dut[0].expect(r'Throughput: compensated (\d+)KB\/s')
173173
tohost_speed_1bit = res.group(1).decode('utf8')
174174
assert int(tohost_speed_1bit) > expected_1b_speed
175175

@@ -210,7 +210,7 @@ def test_sdio_speed_tohost_esp32_esp32(dut: Tuple[IdfDut, IdfDut]) -> None:
210210
)
211211
@pytest.mark.parametrize('app_path, target, config', c5_param_default, indirect=True)
212212
def test_sdio_speed_tohost_esp32p4_esp32c5(dut: Tuple[IdfDut, IdfDut]) -> None:
213-
test_sdio_speed_tohost_flow(dut, 9000, 4000)
213+
test_sdio_speed_tohost_flow(dut, 8500, 4000)
214214

215215

216216
# Retention tests

‎components/esp_driver_sdmmc/test_apps/sdmmc/components/sdmmc_tests/sdmmc_test_begin_end_sd.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/

‎components/esp_driver_sdmmc/test_apps/sdmmc/main/CMakeLists.txt‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
set(srcs "test_app_main.c")
1+
set(srcs "test_app_main.c" "test_sd_driver_resource.c")
22

33
set(priv_requires
44
# tests reside in this component, also available for `sdmmc_console`
@@ -7,6 +7,7 @@ set(priv_requires
77
unity
88
# for PSRAM tests
99
esp_psram
10+
esp_driver_sdmmc
1011
)
1112

1213
idf_component_register(SRCS ${srcs}

‎components/esp_driver_sdmmc/test_apps/sdmmc/main/test_sd_driver_resource.c‎

Lines changed: 120 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,120 @@
1+
/*
2+
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
#include <stdio.h>
7+
#include "sdkconfig.h"
8+
#include "unity.h"
9+
#include "driver/sd_host_sdmmc.h"
10+
#include "driver/sd_host.h"
11+
#include "hal/sdmmc_ll.h"
12+
#include "soc/sdmmc_pins.h"
13+
14+
/*---------------------------------------------------------------
15+
SDMMC
16+
---------------------------------------------------------------*/
17+
#if CONFIG_IDF_TARGET_ESP32
18+
#define SDMMC_SLOT0_CLK SDMMC_SLOT0_IOMUX_PIN_NUM_CLK
19+
#define SDMMC_SLOT0_CMD SDMMC_SLOT0_IOMUX_PIN_NUM_CMD
20+
#define SDMMC_SLOT0_D0 SDMMC_SLOT0_IOMUX_PIN_NUM_D0
21+
#define SDMMC_SLOT0_D1 SDMMC_SLOT0_IOMUX_PIN_NUM_D1
22+
#define SDMMC_SLOT0_D2 SDMMC_SLOT0_IOMUX_PIN_NUM_D2
23+
#define SDMMC_SLOT0_D3 SDMMC_SLOT0_IOMUX_PIN_NUM_D3
24+
#define SDMMC_SLOT1_CLK SDMMC_SLOT1_IOMUX_PIN_NUM_CLK
25+
#define SDMMC_SLOT1_CMD SDMMC_SLOT1_IOMUX_PIN_NUM_CMD
26+
#define SDMMC_SLOT1_D0 SDMMC_SLOT1_IOMUX_PIN_NUM_D0
27+
#define SDMMC_SLOT1_D1 SDMMC_SLOT1_IOMUX_PIN_NUM_D1
28+
#define SDMMC_SLOT1_D2 SDMMC_SLOT1_IOMUX_PIN_NUM_D2
29+
#define SDMMC_SLOT1_D3 SDMMC_SLOT1_IOMUX_PIN_NUM_D3
30+
#elif CONFIG_IDF_TARGET_ESP32S3
31+
#define SDMMC_SLOT0_CLK 10
32+
#define SDMMC_SLOT0_CMD 11
33+
#define SDMMC_SLOT0_D0 12
34+
#define SDMMC_SLOT0_D1 13
35+
#define SDMMC_SLOT0_D2 14
36+
#define SDMMC_SLOT0_D3 15
37+
#define SDMMC_SLOT1_CLK 10
38+
#define SDMMC_SLOT1_CMD 11
39+
#define SDMMC_SLOT1_D0 12
40+
#define SDMMC_SLOT1_D1 13
41+
#define SDMMC_SLOT1_D2 14
42+
#define SDMMC_SLOT1_D3 15
43+
#elif CONFIG_IDF_TARGET_ESP32P4
44+
#define SDMMC_SLOT0_CLK SDMMC_SLOT0_IOMUX_PIN_NUM_CLK
45+
#define SDMMC_SLOT0_CMD SDMMC_SLOT0_IOMUX_PIN_NUM_CMD
46+
#define SDMMC_SLOT0_D0 SDMMC_SLOT0_IOMUX_PIN_NUM_D0
47+
#define SDMMC_SLOT0_D1 SDMMC_SLOT0_IOMUX_PIN_NUM_D1
48+
#define SDMMC_SLOT0_D2 SDMMC_SLOT0_IOMUX_PIN_NUM_D2
49+
#define SDMMC_SLOT0_D3 SDMMC_SLOT0_IOMUX_PIN_NUM_D3
50+
#define SDMMC_SLOT1_CLK 10
51+
#define SDMMC_SLOT1_CMD 11
52+
#define SDMMC_SLOT1_D0 12
53+
#define SDMMC_SLOT1_D1 13
54+
#define SDMMC_SLOT1_D2 14
55+
#define SDMMC_SLOT1_D3 15
56+
#endif
57+
58+
TEST_CASE("SDMMC controller exhausted allocation", "[sdmmc]")
59+
{
60+
sd_host_sdmmc_cfg_t cfg = {
61+
.event_queue_items = 4,
62+
};
63+
sd_host_ctlr_handle_t ctlr[SDMMC_LL_HOST_CTLR_NUMS + 1] = {};
64+
for (int i = 0; i < SDMMC_LL_HOST_CTLR_NUMS; i++) {
65+
TEST_ESP_OK(sd_host_create_sdmmc_controller(&cfg, &ctlr[i]));
66+
}
67+
68+
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, sd_host_create_sdmmc_controller(&cfg, &ctlr[SDMMC_LL_HOST_CTLR_NUMS]));
69+
70+
for (int i = 0; i < SDMMC_LL_HOST_CTLR_NUMS; i++) {
71+
TEST_ESP_OK(sd_host_del_controller(ctlr[i]));
72+
}
73+
}
74+
75+
TEST_CASE("SDMMC slot exhausted allocation", "[sdmmc]")
76+
{
77+
sd_host_sdmmc_cfg_t cfg = {
78+
.event_queue_items = 4,
79+
};
80+
sd_host_ctlr_handle_t ctlr = NULL;
81+
TEST_ESP_OK(sd_host_create_sdmmc_controller(&cfg, &ctlr));
82+
83+
sd_host_slot_sdmmc_init_cfg_t slot_cfg = {
84+
.slot_id = 0,
85+
.sd_mode = SD_MODE_NORMAL,
86+
.io_config = {
87+
.width = 1,
88+
.clk_io = SDMMC_SLOT0_CLK,
89+
.cmd_io = SDMMC_SLOT0_CMD,
90+
.d0_io = SDMMC_SLOT0_D0,
91+
.d1_io = SDMMC_SLOT0_D1,
92+
.d2_io = SDMMC_SLOT0_D2,
93+
.d3_io = SDMMC_SLOT0_D3,
94+
}
95+
};
96+
sd_host_slot_handle_t slot[SOC_SDMMC_NUM_SLOTS] = {};
97+
98+
#if !CONFIG_IDF_TARGET_ESP32
99+
//Slot 0 on the ESP32 overlaps with the default SPI Flash pins
100+
TEST_ESP_OK(sd_host_sdmmc_controller_add_slot(ctlr, &slot_cfg, &slot[0]));
101+
#endif
102+
103+
slot_cfg.slot_id = 1;
104+
slot_cfg.io_config.clk_io = SDMMC_SLOT1_CLK;
105+
slot_cfg.io_config.cmd_io = SDMMC_SLOT1_CMD;
106+
slot_cfg.io_config.d0_io = SDMMC_SLOT1_D0;
107+
slot_cfg.io_config.d1_io = SDMMC_SLOT1_D1;
108+
slot_cfg.io_config.d2_io = SDMMC_SLOT1_D2;
109+
slot_cfg.io_config.d3_io = SDMMC_SLOT1_D3;
110+
TEST_ESP_OK(sd_host_sdmmc_controller_add_slot(ctlr, &slot_cfg, &slot[1]));
111+
112+
TEST_ESP_ERR(ESP_ERR_INVALID_STATE, sd_host_sdmmc_controller_add_slot(ctlr, &slot_cfg, &slot[SOC_SDMMC_NUM_SLOTS]));
113+
114+
#if !CONFIG_IDF_TARGET_ESP32
115+
//Slot 0 on the ESP32 overlaps with the default SPI Flash pins
116+
TEST_ESP_OK(sd_host_remove_slot(slot[0]));
117+
#endif
118+
TEST_ESP_OK(sd_host_remove_slot(slot[1]));
119+
TEST_ESP_OK(sd_host_del_controller(ctlr));
120+
}

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