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wancklsuda-morris
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feat(driver_gpio): add esp32h4 basic gpio support
1 parent f9765d0 commit 0ed5a94

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18 files changed

+656
-198
lines changed

18 files changed

+656
-198
lines changed

components/esp_hw_support/port/esp32h4/rtc_clk.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
#include "esp_hw_log.h"
1717
#include "esp_rom_sys.h"
1818
#include "hal/clk_tree_ll.h"
19+
#include "hal/gpio_ll.h"
1920
#include "hal/regi2c_ctrl_ll.h"
2021
#include "soc/io_mux_reg.h"
2122
#include "soc/lp_aon_reg.h"
@@ -50,14 +51,14 @@ void rtc_clk_32k_enable(bool enable)
5051
void rtc_clk_32k_enable_external(void)
5152
{
5253
// EXT_OSC_SLOW_GPIO_NUM == GPIO_NUM_0
53-
PIN_INPUT_ENABLE(IO_MUX_GPIO0_REG);
54+
gpio_ll_input_enable(&GPIO, GPIO_NUM_0);
5455
REG_SET_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM));
5556
clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL);
5657
}
5758

5859
void rtc_clk_32k_disable_external(void)
5960
{
60-
PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG);
61+
gpio_ll_input_disable(&GPIO, GPIO_NUM_0);
6162
REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM));
6263
clk_ll_xtal32k_disable();
6364
}
@@ -155,7 +156,7 @@ static void rtc_clk_bbpll_configure(soc_xtal_freq_t xtal_freq, int pll_freq)
155156
regi2c_ctrl_ll_bbpll_calibration_start();
156157
clk_ll_bbpll_set_config(pll_freq, xtal_freq);
157158
/* WAIT CALIBRATION DONE */
158-
while(!regi2c_ctrl_ll_bbpll_calibration_is_done());
159+
while (!regi2c_ctrl_ll_bbpll_calibration_is_done());
159160
/* BBPLL CALIBRATION STOP */
160161
regi2c_ctrl_ll_bbpll_calibration_stop();
161162

components/esp_rom/esp32h4/include/esp32h4/rom/gpio.h

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,6 @@
1010
#include <stdbool.h>
1111
#include "soc/gpio_reg.h"
1212

13-
//TODO: [ESP32H4] IDF-12390 inherit from verification branch, need check
14-
1513
#ifdef __cplusplus
1614
extern "C" {
1715
#endif
@@ -27,9 +25,6 @@ extern "C" {
2725
#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
2826
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
2927

30-
#define GPIO_FUNC_ZERO 0
31-
#define GPIO_FUNC_GPIO 1
32-
3328
#define GPIO_OUTPUT_SET(gpio_no, bit_value) gpio_set_output_level(gpio_no, bit_value)
3429
#define GPIO_DIS_OUTPUT(gpio_no) gpio_output_disable(gpio_no)
3530
#define GPIO_INPUT_GET(gpio_no) gpio_get_input_level(gpio_no)
@@ -55,8 +50,8 @@ uint32_t gpio_get_input_level(uint32_t gpio_num);
5550
* @brief set gpio input to a signal, one gpio can input to several signals.
5651
*
5752
* @param uint32_t gpio_num : gpio number
58-
* gpio == GPIO_NUM_IN_FORCE_0, input 0 to signal
59-
* gpio == GPIO_NUM_IN_FORCE_1, input 1 to signal
53+
* gpio == GPIO_MATRIX_CONST_ZERO_INPUT, input 0 to signal
54+
* gpio == GPIO_MATRIX_CONST_ONE_INPUT, input 1 to signal
6055
*
6156
* @param uint32_t signal_idx : signal index.
6257
*

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