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songruosongruo
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Merge branch 'feature/esp32c61_eco3_gpio_update' into 'master'
change(gpio): add GPIO25~29 for ESP32C61 ECO3 Closes IDF-12874 and IDF-9316 See merge request espressif/esp-idf!39714
2 parents f4e8813 + da4ac0c commit 0fa5b07

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15 files changed

+97
-37
lines changed

15 files changed

+97
-37
lines changed

‎components/esp_rom/esp32c61/include/esp32c61/rom/gpio.h‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -44,7 +44,7 @@ typedef enum {
4444

4545

4646
/**
47-
* @brief Change GPIO(0-24) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
47+
* @brief Change GPIO(0-29) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
4848
* There is no particular ordering guaranteed; so if the order of writes is significant,
4949
* calling code should divide a single call into multiple calls.
5050
*
@@ -61,7 +61,7 @@ typedef enum {
6161
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
6262

6363
/**
64-
* @brief Sample the value of GPIO input pins(0-24) and returns a bitmask.
64+
* @brief Sample the value of GPIO input pins(0-29) and returns a bitmask.
6565
* @param None
6666
*
6767
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
@@ -93,7 +93,7 @@ void gpio_pin_wakeup_disable(void);
9393
/**
9494
* @brief set gpio input to a signal, one gpio can input to several signals.
9595
*
96-
* @param uint32_t gpio : gpio number, 0~24
96+
* @param uint32_t gpio : gpio number, 0~29
9797
* gpio == 0x30, input 0 to signal
9898
* gpio == 0x20, input 1 to signal
9999
*
@@ -108,10 +108,10 @@ void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
108108
/**
109109
* @brief set signal output to gpio, one signal can output to several gpios.
110110
*
111-
* @param uint32_t gpio : gpio number, 0~24
111+
* @param uint32_t gpio : gpio number, 0~29
112112
*
113113
* @param uint32_t signal_idx : signal index.
114-
* signal_idx == 0x80, cancel output put to the gpio
114+
* signal_idx == 0x100, cancel output put to the gpio
115115
*
116116
* @param bool out_inv : the signal output is invert or not
117117
*
@@ -124,7 +124,7 @@ void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_
124124
/**
125125
* @brief Select pad as a gpio function from IOMUX.
126126
*
127-
* @param uint32_t gpio_num : gpio number, 0~24
127+
* @param uint32_t gpio_num : gpio number, 0~29
128128
*
129129
* @return None
130130
*/
@@ -133,7 +133,7 @@ void gpio_pad_select_gpio(uint32_t gpio_num);
133133
/**
134134
* @brief Set pad driver capability.
135135
*
136-
* @param uint32_t gpio_num : gpio number, 0~24
136+
* @param uint32_t gpio_num : gpio number, 0~29
137137
*
138138
* @param uint32_t drv : 0-3
139139
*
@@ -144,7 +144,7 @@ void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
144144
/**
145145
* @brief Pull up the pad from gpio number.
146146
*
147-
* @param uint32_t gpio_num : gpio number, 0~24
147+
* @param uint32_t gpio_num : gpio number, 0~29
148148
*
149149
* @return None
150150
*/
@@ -153,7 +153,7 @@ void gpio_pad_pullup(uint32_t gpio_num);
153153
/**
154154
* @brief Pull down the pad from gpio number.
155155
*
156-
* @param uint32_t gpio_num : gpio number, 0~24
156+
* @param uint32_t gpio_num : gpio number, 0~29
157157
*
158158
* @return None
159159
*/
@@ -162,7 +162,7 @@ void gpio_pad_pulldown(uint32_t gpio_num);
162162
/**
163163
* @brief Unhold the pad from gpio number.
164164
*
165-
* @param uint32_t gpio_num : gpio number, 0~24
165+
* @param uint32_t gpio_num : gpio number, 0~29
166166
*
167167
* @return None
168168
*/
@@ -171,7 +171,7 @@ void gpio_pad_unhold(uint32_t gpio_num);
171171
/**
172172
* @brief Hold the pad from gpio number.
173173
*
174-
* @param uint32_t gpio_num : gpio number, 0~24
174+
* @param uint32_t gpio_num : gpio number, 0~29
175175
*
176176
* @return None
177177
*/
@@ -180,7 +180,7 @@ void gpio_pad_hold(uint32_t gpio_num);
180180
/**
181181
* @brief enable gpio pad input.
182182
*
183-
* @param uint32_t gpio_num : gpio number, 0~24
183+
* @param uint32_t gpio_num : gpio number, 0~29
184184
*
185185
* @return None
186186
*/
@@ -189,7 +189,7 @@ void gpio_pad_input_enable(uint32_t gpio_num);
189189
/**
190190
* @brief disable gpio pad input.
191191
*
192-
* @param uint32_t gpio_num : gpio number, 0~24
192+
* @param uint32_t gpio_num : gpio number, 0~29
193193
*
194194
* @return None
195195
*/

‎components/soc/esp32c61/gpio_periph.c‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -32,6 +32,11 @@ const uint32_t GPIO_HOLD_MASK[] = {
3232
BIT(22), //GPIO22
3333
BIT(23), //GPIO23
3434
BIT(24), //GPIO24
35+
BIT(25), //GPIO25
36+
BIT(26), //GPIO26
37+
BIT(27), //GPIO27
38+
BIT(28), //GPIO28
39+
BIT(29), //GPIO29
3540
};
3641

3742
_Static_assert(sizeof(GPIO_HOLD_MASK) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_HOLD_MASK");

‎components/soc/esp32c61/include/soc/Kconfig.soc_caps.in‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -385,7 +385,7 @@ config SOC_GPIO_PORT
385385

386386
config SOC_GPIO_PIN_COUNT
387387
int
388-
default 25
388+
default 30
389389

390390
config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
391391
bool
@@ -409,11 +409,11 @@ config SOC_LP_IO_CLOCK_IS_INDEPENDENT
409409

410410
config SOC_GPIO_IN_RANGE_MAX
411411
int
412-
default 24
412+
default 29
413413

414414
config SOC_GPIO_OUT_RANGE_MAX
415415
int
416-
default 24
416+
default 29
417417

418418
config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
419419
bool
@@ -429,7 +429,7 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT
429429

430430
config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
431431
hex
432-
default 0x1FFFF80
432+
default 0x3FFFFF80
433433

434434
config SOC_GPIO_SUPPORT_FORCE_HOLD
435435
bool

‎components/soc/esp32c61/include/soc/gpio_num.h‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -40,6 +40,11 @@ typedef enum {
4040
GPIO_NUM_22 = 22, /*!< GPIO22, input and output */
4141
GPIO_NUM_23 = 23, /*!< GPIO23, input and output */
4242
GPIO_NUM_24 = 24, /*!< GPIO24, input and output */
43+
GPIO_NUM_25 = 25, /*!< GPIO25, input and output */
44+
GPIO_NUM_26 = 26, /*!< GPIO26, input and output */
45+
GPIO_NUM_27 = 27, /*!< GPIO27, input and output */
46+
GPIO_NUM_28 = 28, /*!< GPIO28, input and output */
47+
GPIO_NUM_29 = 29, /*!< GPIO29, input and output */
4348
GPIO_NUM_MAX,
4449
} gpio_num_t;
4550

‎components/soc/esp32c61/include/soc/soc_caps.h‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -161,7 +161,7 @@
161161
/*-------------------------- GPIO CAPS ---------------------------------------*/
162162
// ESP32-C61 has 1 GPIO peripheral
163163
#define SOC_GPIO_PORT 1U
164-
#define SOC_GPIO_PIN_COUNT 25
164+
#define SOC_GPIO_PIN_COUNT 30
165165
#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
166166
#define SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1
167167

@@ -178,16 +178,16 @@
178178
#define SOC_GPIO_VALID_GPIO_MASK ((1ULL<<SOC_GPIO_PIN_COUNT) - 1)
179179
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK
180180

181-
#define SOC_GPIO_IN_RANGE_MAX 24
182-
#define SOC_GPIO_OUT_RANGE_MAX 24
181+
#define SOC_GPIO_IN_RANGE_MAX 29
182+
#define SOC_GPIO_OUT_RANGE_MAX 29
183183

184184
// GPIO0~6 on ESP32C61 can support chip deep sleep wakeup
185185
#define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1)
186186
#define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6)
187187
#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (7)
188188

189-
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_7~GPIO_NUM_24)
190-
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x1FFFF80ULL
189+
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_7~GPIO_NUM_29)
190+
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x3FFFFF80ULL
191191

192192
// Support to force hold all IOs
193193
#define SOC_GPIO_SUPPORT_FORCE_HOLD (1)

‎components/soc/esp32c61/register/soc/io_mux_reg.h‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -112,9 +112,8 @@ extern "C" {
112112
#define EXT_OSC_SLOW_GPIO_NUM 0
113113

114114
#define MAX_RTC_GPIO_NUM 6
115-
#define MAX_PAD_GPIO_NUM 24
116-
#define MAX_GPIO_NUM 28
117-
#define HIGH_IO_HOLD_BIT_SHIFT 32
115+
#define MAX_PAD_GPIO_NUM 29
116+
#define MAX_GPIO_NUM 33
118117

119118
#define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE
120119
// definitions above are inherited from previous version of code, should double check

‎components/soc/esp32c61/rtc_io_periph.c‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -32,4 +32,9 @@ const int rtc_io_num_map[SOC_GPIO_PIN_COUNT] = {
3232
-1,//GPIO22
3333
-1,//GPIO23
3434
-1,//GPIO24
35+
-1,//GPIO25
36+
-1,//GPIO26
37+
-1,//GPIO27
38+
-1,//GPIO28
39+
-1,//GPIO29
3540
};

‎components/soc/esp32h2/register/soc/io_mux_reg.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,6 @@
163163
#define MAX_RTC_GPIO_NUM 14 // GPIO7~14 are the pads with LP function
164164
#define MAX_PAD_GPIO_NUM 27
165165
#define MAX_GPIO_NUM 31
166-
#define HIGH_IO_HOLD_BIT_SHIFT 32
167166

168167

169168
#define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE

‎components/soc/esp32h21/register/soc/io_mux_reg.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -150,7 +150,6 @@ extern "C" {
150150
#define MAX_RTC_GPIO_NUM 11 // GPIO5~11 are the pads with LP function
151151
#define MAX_PAD_GPIO_NUM 25
152152
#define MAX_GPIO_NUM 29
153-
#define HIGH_IO_HOLD_BIT_SHIFT 32
154153

155154
#define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE
156155

‎components/soc/esp32h4/register/soc/io_mux_reg.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,6 @@ extern "C" {
133133
#define MAX_RTC_GPIO_NUM 5
134134
#define MAX_PAD_GPIO_NUM 39
135135
#define MAX_GPIO_NUM 39
136-
#define HIGH_IO_HOLD_BIT_SHIFT 32
137136

138137
#define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE
139138
// definitions above are inherited from previous version of code, should double check

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