2727
2828#include "esp_private/cache_utils.h"
2929#include "esp_private/esp_cache_esp32_private.h"
30+ #include "esp_private/esp_cache_private.h"
3031#include "esp_private/esp_mmu_map_private.h"
3132#include "ext_mem_layout.h"
3233#include "esp_mmu_map.h"
@@ -373,6 +374,26 @@ IRAM_ATTR esp_err_t esp_mmu_paddr_find_caps(const esp_paddr_t paddr, mmu_mem_cap
373374 return ESP_OK ;
374375}
375376
377+ static void IRAM_ATTR NOINLINE_ATTR s_stop_cache (void )
378+ {
379+ #if SOC_CACHE_FREEZE_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4
380+ // On P4, due to limitations on stalling another core, we temporarily use cache disable/enable
381+ esp_cache_freeze_caches_disable_interrupts ();
382+ #else
383+ spi_flash_disable_interrupts_caches_and_other_cpu ();
384+ #endif
385+ }
386+
387+ static void IRAM_ATTR NOINLINE_ATTR s_start_cache (void )
388+ {
389+ #if SOC_CACHE_FREEZE_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4
390+ // On P4, due to limitations on stalling another core, we temporarily use cache disable/enable
391+ esp_cache_unfreeze_caches_enable_interrupts ();
392+ #else
393+ spi_flash_enable_interrupts_caches_and_other_cpu ();
394+ #endif
395+ }
396+
376397static void IRAM_ATTR NOINLINE_ATTR s_do_cache_invalidate (uint32_t vaddr_start , uint32_t size )
377398{
378399#if CONFIG_IDF_TARGET_ESP32
@@ -416,10 +437,8 @@ static void IRAM_ATTR NOINLINE_ATTR s_do_mapping(mmu_target_t target, uint32_t v
416437{
417438 /**
418439 * Disable Cache, after this function, involved code and data should be placed in internal RAM.
419- *
420- * @note we call this for now, but this will be refactored to move out of `spi_flash`
421440 */
422- spi_flash_disable_interrupts_caches_and_other_cpu ();
441+ s_stop_cache ();
423442
424443 uint32_t actual_mapped_len = s_mapping_operation (target , vaddr_start , paddr_start , size );
425444
@@ -433,7 +452,7 @@ static void IRAM_ATTR NOINLINE_ATTR s_do_mapping(mmu_target_t target, uint32_t v
433452 s_do_cache_invalidate (vaddr_start , size );
434453
435454 //enable Cache, after this function, internal RAM access is no longer mandatory
436- spi_flash_enable_interrupts_caches_and_other_cpu ();
455+ s_start_cache ();
437456
438457 ESP_EARLY_LOGV (TAG , "actual_mapped_len is 0x%" PRIx32 , actual_mapped_len );
439458}
@@ -613,15 +632,13 @@ static void IRAM_ATTR NOINLINE_ATTR s_do_unmapping(uint32_t vaddr_start, uint32_
613632{
614633 /**
615634 * Disable Cache, after this function, involved code and data should be placed in internal RAM.
616- *
617- * @note we call this for now, but this will be refactored to move out of `spi_flash`
618635 */
619- spi_flash_disable_interrupts_caches_and_other_cpu ();
636+ s_stop_cache ();
620637
621638 s_unmapping_operation (vaddr_start , size );
622639
623640 //enable Cache, after this function, internal RAM access is no longer mandatory
624- spi_flash_enable_interrupts_caches_and_other_cpu ();
641+ s_start_cache ();
625642}
626643
627644esp_err_t esp_mmu_unmap (void * ptr )
@@ -759,8 +776,11 @@ esp_err_t IRAM_ATTR esp_mmu_map_dump_mapped_blocks_private(void)
759776static bool NOINLINE_ATTR IRAM_ATTR s_vaddr_to_paddr (uint32_t vaddr , esp_paddr_t * out_paddr , mmu_target_t * out_target )
760777{
761778 uint32_t mmu_id = 0 ;
762- //we call this for now, but this will be refactored to move out of `spi_flash`
763- spi_flash_disable_interrupts_caches_and_other_cpu ();
779+ /**
780+ * Disable Cache, after this function, involved code and data should be placed in internal RAM.
781+ */
782+ s_stop_cache ();
783+
764784#if SOC_MMU_PER_EXT_MEM_TARGET
765785 mmu_id = mmu_hal_get_id_from_vaddr (vaddr );
766786#endif
@@ -770,7 +790,9 @@ static bool NOINLINE_ATTR IRAM_ATTR s_vaddr_to_paddr(uint32_t vaddr, esp_paddr_t
770790 is_mapped = mmu_hal_vaddr_to_paddr (1 , vaddr , out_paddr , out_target );
771791 }
772792#endif
773- spi_flash_enable_interrupts_caches_and_other_cpu ();
793+
794+ //enable Cache, after this function, internal RAM access is no longer mandatory
795+ s_start_cache ();
774796
775797 return is_mapped ;
776798}
@@ -794,14 +816,19 @@ esp_err_t esp_mmu_vaddr_to_paddr(void *vaddr, esp_paddr_t *out_paddr, mmu_target
794816
795817static bool NOINLINE_ATTR IRAM_ATTR s_paddr_to_vaddr (esp_paddr_t paddr , mmu_target_t target , mmu_vaddr_t type , uint32_t * out_vaddr )
796818{
797- //we call this for now, but this will be refactored to move out of `spi_flash`
798- spi_flash_disable_interrupts_caches_and_other_cpu ();
819+ /**
820+ * Disable Cache, after this function, involved code and data should be placed in internal RAM.
821+ */
822+ s_stop_cache ();
823+
799824 uint32_t mmu_id = 0 ;
800825#if SOC_MMU_PER_EXT_MEM_TARGET
801826 mmu_id = mmu_hal_get_id_from_target (target );
802827#endif
803828 bool found = mmu_hal_paddr_to_vaddr (mmu_id , paddr , target , type , out_vaddr );
804- spi_flash_enable_interrupts_caches_and_other_cpu ();
829+
830+ //enable Cache, after this function, internal RAM access is no longer mandatory
831+ s_start_cache ();
805832
806833 return found ;
807834}
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