Merge branch 'fix/gdma_psram_esp32c5' into 'master'

test(dma): only test 40MHz on esp32c5

Closes IDFCI-2876, IDFCI-2897, IDF-13029, and IDF-13035

See merge request espressif/esp-idf!38918

Author: suda-morris

components/esp_driver_gptimer/src/gptimer.c

@@ -137,7 +137,8 @@ esp_err_t gptimer_new_timer(const gptimer_config_t *config, gptimer_handle_t *re
     ESP_RETURN_ON_FALSE(allow_pd == false, ESP_ERR_NOT_SUPPORTED, TAG, "not able to power down in light sleep");
 #endif // SOC_TIMER_SUPPORT_SLEEP_RETENTION
 
-    timer = heap_caps_calloc(1, sizeof(gptimer_t), GPTIMER_MEM_ALLOC_CAPS);
+    // always allocate memory from internal memory because the driver object contains atomic variable
+    timer = heap_caps_calloc(1, sizeof(gptimer_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
     ESP_GOTO_ON_FALSE(timer, ESP_ERR_NO_MEM, err, TAG, "no mem for gptimer");
     // register timer to the group (because one group can have several timers)
     ESP_GOTO_ON_ERROR(gptimer_register_to_group(timer), err, TAG, "register timer failed");
@@ -392,7 +393,7 @@ esp_err_t gptimer_start(gptimer_handle_t timer)
     }
 
     gptimer_fsm_t expected_fsm = GPTIMER_FSM_ENABLE;
-    if (atomic_compare_exchange_strong(&timer->fsm, &expected_fsm, GPTIMER_FSM_RUN_WAIT)) {
+    if (atomic_compare_exchange_strong(&timer->fsm, &expected_fsm, GPTIMER_FSM_WAIT)) {
         // the register used by the following LL functions are shared with other API,
         // which is possible to run along with this function, so we need to protect
         portENTER_CRITICAL_SAFE(&timer->spinlock);
@@ -423,7 +424,7 @@ esp_err_t gptimer_stop(gptimer_handle_t timer)
     }
 
     gptimer_fsm_t expected_fsm = GPTIMER_FSM_RUN;
-    if (atomic_compare_exchange_strong(&timer->fsm, &expected_fsm, GPTIMER_FSM_ENABLE_WAIT)) {
+    if (atomic_compare_exchange_strong(&timer->fsm, &expected_fsm, GPTIMER_FSM_WAIT)) {
         // disable counter, alarm, auto-reload
         portENTER_CRITICAL_SAFE(&timer->spinlock);
         timer_ll_enable_counter(timer->hal.dev, timer->timer_id, false);

components/esp_driver_gptimer/src/gptimer_priv.h

@@ -74,11 +74,10 @@ typedef struct gptimer_group_t {
 } gptimer_group_t;
 
 typedef enum {
-    GPTIMER_FSM_INIT,        // Timer is initialized, but not enabled
-    GPTIMER_FSM_ENABLE,      // Timer is enabled, but is not running
-    GPTIMER_FSM_ENABLE_WAIT, // Timer is in the middle of the enable process (Intermediate state)
-    GPTIMER_FSM_RUN,         // Timer is in running
-    GPTIMER_FSM_RUN_WAIT,    // Timer is in the middle of the run process (Intermediate state)
+    GPTIMER_FSM_INIT,    // Timer is initialized, but not enabled yet
+    GPTIMER_FSM_ENABLE,  // Timer is enabled, but is not running yet
+    GPTIMER_FSM_RUN,     // Timer is in running
+    GPTIMER_FSM_WAIT,    // Timer is in the middle of state change (Intermediate state)
 } gptimer_fsm_t;
 
 struct gptimer_t {

components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt

@@ -17,6 +17,6 @@ endif()
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(
     SRCS ${srcs}
-    PRIV_REQUIRES unity esp_driver_gptimer esp_driver_gpio
+    PRIV_REQUIRES unity esp_driver_gptimer esp_driver_gpio esp_psram
     WHOLE_ARCHIVE
 )

components/esp_driver_gptimer/test_apps/gptimer/sdkconfig.defaults.esp32p4

@@ -0,0 +1,3 @@
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_MODE_HEX=y
+CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0

components/esp_driver_mcpwm/src/mcpwm_cap.c

@@ -283,7 +283,7 @@ esp_err_t mcpwm_new_capture_channel(mcpwm_cap_timer_handle_t cap_timer, const mc
     }
 
     // create instance firstly, then install onto platform
-    cap_chan = calloc(1, sizeof(mcpwm_cap_channel_t));
+    cap_chan = heap_caps_calloc(1, sizeof(mcpwm_cap_channel_t), MCPWM_MEM_ALLOC_CAPS);
     ESP_GOTO_ON_FALSE(cap_chan, ESP_ERR_NO_MEM, err, TAG, "no mem for capture channel");
 
     ESP_GOTO_ON_ERROR(mcpwm_capture_channel_register_to_timer(cap_chan, cap_timer), err, TAG, "register channel failed");

components/esp_driver_mcpwm/test_apps/mcpwm/main/CMakeLists.txt

@@ -24,5 +24,5 @@ endif()
 # In order for the cases defined by `TEST_CASE` to be linked into the final elf,
 # the component can be registered as WHOLE_ARCHIVE
 idf_component_register(SRCS ${srcs}
-                       PRIV_REQUIRES unity esp_driver_mcpwm esp_driver_gpio esp_driver_gptimer
+                       PRIV_REQUIRES unity esp_driver_mcpwm esp_driver_gpio esp_driver_gptimer esp_psram
                        WHOLE_ARCHIVE)

components/esp_driver_mcpwm/test_apps/mcpwm/main/test_mcpwm_sleep.c

@@ -57,7 +57,6 @@ static void test_mcpwm_timer_sleep_retention(bool allow_pd)
     printf("create generator\r\n");
     mcpwm_generator_config_t gen_config = {
         .gen_gpio_num = generator_gpio,
-        .flags.io_loop_back = true,
     };
     mcpwm_gen_handle_t gen = NULL;
     TEST_ESP_OK(mcpwm_new_generator(oper, &gen_config, &gen));

components/esp_driver_mcpwm/test_apps/mcpwm/sdkconfig.defaults.esp32p4

@@ -0,0 +1,3 @@
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_MODE_HEX=y
+CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0

components/esp_driver_parlio/test_apps/parlio/sdkconfig.defaults.esp32c5

@@ -1,2 +1,3 @@
 CONFIG_SPIRAM=y
-CONFIG_SPIRAM_SPEED_80M=y
+CONFIG_SPIRAM_SPEED_40M=y
+CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0

components/esp_hw_support/test_apps/dma/sdkconfig.defaults.esp32c5

@@ -1,2 +1,2 @@
 CONFIG_SPIRAM=y
-CONFIG_SPIRAM_SPEED_80M=y
+CONFIG_SPIRAM_SPEED_40M=y