Merge branch 'bugfix/idf-11425' into 'master'

power management module memory (iram or flash) usage optimization

Closes IDF-11425

See merge request espressif/esp-idf!37550

Author: Jiang Jiang Jian

components/esp_adc/Kconfig

@@ -2,6 +2,7 @@ menu "ADC and ADC Calibration"
 
     config ADC_ONESHOT_CTRL_FUNC_IN_IRAM
         bool "Place ISR version ADC oneshot mode read function into IRAM"
+        select ESP_PERIPH_CTRL_FUNC_IN_IRAM
         default n
         help
             Place ISR version ADC oneshot mode read function into IRAM.

components/esp_driver_parlio/Kconfig

@@ -6,6 +6,7 @@ menu "ESP-Driver:Parallel IO Configurations"
         default y
         select PARLIO_OBJ_CACHE_SAFE
         select GDMA_CTRL_FUNC_IN_IRAM
+        select ESP_PERIPH_CTRL_FUNC_IN_IRAM
         help
             Place Parallel IO TX ISR handler in IRAM to reduce latency caused by cache miss.
 

components/esp_driver_spi/Kconfig

@@ -23,6 +23,7 @@ menu "ESP-Driver:SPI Configurations"
         bool "Place SPI master ISR function into IRAM"
         default y
         depends on !HEAP_PLACE_FUNCTION_INTO_FLASH
+        select ESP_PERIPH_CTRL_FUNC_IN_IRAM
         select ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM
         select GDMA_CTRL_FUNC_IN_IRAM if SOC_GDMA_SUPPORTED
         help
@@ -51,6 +52,7 @@ menu "ESP-Driver:SPI Configurations"
     config SPI_SLAVE_ISR_IN_IRAM
         bool "Place SPI slave ISR function into IRAM"
         default y
+        select ESP_PERIPH_CTRL_FUNC_IN_IRAM
         select GDMA_CTRL_FUNC_IN_IRAM if SOC_GDMA_SUPPORTED
         help
             Place the SPI slave ISR in to IRAM to avoid possible cache miss.

components/esp_hw_support/Kconfig

@@ -70,6 +70,10 @@ menu "Hardware Settings"
         # regardless of power management configuration.
         config ESP_SLEEP_POWER_DOWN_FLASH
             bool "Power down flash in light sleep when there is no SPIRAM or SPIRAM has independent power supply"
+            # TODO: PM-383
+            select PM_SLP_IRAM_OPT if (!IDF_TARGET_ESP32H21 && !IDF_TARGET_ESP32H4)
+            select ESP_PERIPH_CTRL_FUNC_IN_IRAM
+            select ESP_REGI2C_CTRL_FUNC_IN_IRAM
             depends on !SPIRAM || ESP_LDO_RESERVE_PSRAM
             depends on !(IDF_TARGET_ESP32P4 && (ESP32P4_REV_MIN_FULL < 100))
             default n
@@ -219,12 +223,19 @@ menu "Hardware Settings"
     endmenu
 
     menu "Peripheral Control"
-        config PERIPH_CTRL_FUNC_IN_IRAM
+        config ESP_PERIPH_CTRL_FUNC_IN_IRAM
             bool "Place peripheral control functions into IRAM"
             default n
             help
                 Place peripheral control functions (e.g. periph_module_reset) into IRAM,
                 so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
+
+        config ESP_REGI2C_CTRL_FUNC_IN_IRAM
+            bool "Place regi2c control functions into IRAM"
+            default y
+            help
+                Place analog i2c master control functions (e.g. regi2c_ctrl_read_reg, regi2c_ctrl_write_reg) into IRAM,
+                so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
     endmenu
 
     menu "ETM Configuration"

components/esp_hw_support/esp_clk.c

@@ -26,6 +26,12 @@
 
 #define MHZ (1000000)
 
+#if CONFIG_PM_SLP_IRAM_OPT
+# define ESP_CLK_FN_ATTR    IRAM_ATTR
+#else
+# define ESP_CLK_FN_ATTR
+#endif
+
 // g_ticks_us defined in ROMs for PRO and APP CPU
 extern uint32_t g_ticks_per_us_pro;
 
@@ -48,7 +54,7 @@ _Static_assert(offsetof(retain_mem_t, checksum) == sizeof(retain_mem_t) - sizeof
 #if !NON_OS_BUILD
 static __attribute__((section(".rtc_timer_data_in_rtc_mem"))) retain_mem_t s_rtc_timer_retain_mem;
 
-static uint32_t calc_checksum(void)
+static ESP_CLK_FN_ATTR uint32_t calc_checksum(void)
 {
     uint32_t checksum = 0;
     uint32_t *data = (uint32_t*) &s_rtc_timer_retain_mem;

components/esp_hw_support/linker.lf

@@ -12,36 +12,61 @@ entries:
         cpu: esp_cpu_clear_watchpoint (noflash)
     cpu: esp_cpu_compare_and_set (noflash)
     esp_memory_utils (noflash)
-    rtc_clk (noflash)
     clk_utils (noflash)
+    if PM_SLP_IRAM_OPT = y:
+        rtc_clk (noflash)
+        rtc_time (noflash_text)
     if SOC_CONFIGURABLE_VDDSDIO_SUPPORTED = y:
         rtc_init:rtc_vddsdio_get_config (noflash)
         rtc_init:rtc_vddsdio_set_config (noflash)
     if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y || IDF_TARGET_ESP32S3 = y || IDF_TARGET_ESP32C2 = y || IDF_TARGET_ESP32C3 = y:
-        rtc_sleep (noflash_text)
-    rtc_time (noflash_text)
+        rtc_sleep:rtc_sleep_start (noflash)
+        if PM_SLP_IRAM_OPT = y:
+            rtc_sleep:rtc_sleep_get_default_config (noflash)
+            rtc_sleep:rtc_sleep_init (noflash)
+            rtc_sleep:rtc_sleep_low_init (noflash)
+    if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y:
+        rtc_sleep:rtc_sleep_pd (noflash)
+    if IDF_TARGET_ESP32S3 = y || IDF_TARGET_ESP32C2 = y || IDF_TARGET_ESP32C3 = y:
+        rtc_sleep:rtc_sleep_pu (noflash)
     if SOC_PMU_SUPPORTED = y && SOC_LIGHT_SLEEP_SUPPORTED = y:
         pmu_sleep (noflash)
-    if SPIRAM_FLASH_LOAD_TO_PSRAM = y:
-        pmu_init (noflash)
-        pmu_param (noflash)
-    if SOC_USB_SERIAL_JTAG_SUPPORTED = y:
+        if SPIRAM_FLASH_LOAD_TO_PSRAM = y:
+            pmu_init (noflash)
+            pmu_param (noflash)
+        elif PM_SLP_IRAM_OPT = y && IDF_TARGET_ESP32P4 != y:
+            pmu_param:get_act_hp_dbias (noflash)
+            pmu_param:get_act_lp_dbias (noflash)
+    if PM_SLP_IRAM_OPT = y && SOC_USB_SERIAL_JTAG_SUPPORTED = y:
         sleep_console (noflash)
-    if SOC_USB_OTG_SUPPORTED && SOC_PM_SUPPORT_CNNT_PD = y:
+    if PM_SLP_IRAM_OPT = y && SOC_USB_OTG_SUPPORTED && SOC_PM_SUPPORT_CNNT_PD = y:
         sleep_usb (noflash)
     if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y:
         rtc_wdt (noflash_text)
-    if PERIPH_CTRL_FUNC_IN_IRAM = y:
-        periph_ctrl: periph_module_reset (noflash)
-    if PERIPH_CTRL_FUNC_IN_IRAM = y && ESP_WIFI_ENABLED = y:
+    if ESP_PERIPH_CTRL_FUNC_IN_IRAM = y:
+        periph_ctrl:periph_module_reset (noflash)
+        periph_ctrl:periph_rcc_enter (noflash)
+        periph_ctrl:periph_rcc_exit (noflash)
+        periph_ctrl:periph_rcc_acquire_enter (noflash)
+        periph_ctrl:periph_rcc_acquire_exit (noflash)
+        periph_ctrl:periph_rcc_release_enter (noflash)
+        periph_ctrl:periph_rcc_release_exit (noflash)
+    if ESP_PERIPH_CTRL_FUNC_IN_IRAM = y && ESP_WIFI_ENABLED = y:
         periph_ctrl: wifi_module_enable (noflash)
         periph_ctrl: wifi_module_disable (noflash)
+    if ESP_REGI2C_CTRL_FUNC_IN_IRAM = y:
+        regi2c_ctrl:regi2c_ctrl_read_reg (noflash)
+        regi2c_ctrl:regi2c_ctrl_read_reg_mask (noflash)
+        regi2c_ctrl:regi2c_ctrl_write_reg (noflash)
+        regi2c_ctrl:regi2c_ctrl_write_reg_mask (noflash)
+        regi2c_ctrl:regi2c_enter_critical (noflash)
+        regi2c_ctrl:regi2c_exit_critical (noflash)
     if SOC_SYSTIMER_SUPPORTED = y:
         systimer (noflash)
     if SOC_ADC_SHARED_POWER = y:
         if ADC_ONESHOT_CTRL_FUNC_IN_IRAM = y:
             sar_periph_ctrl (noflash)
-        else:
+        elif PM_SLP_IRAM_OPT = y:
             sar_periph_ctrl: sar_periph_ctrl_power_enable (noflash)
 
 [mapping:soc_pm]

components/esp_hw_support/periph_ctrl.c

@@ -21,35 +21,35 @@ static portMUX_TYPE periph_spinlock = portMUX_INITIALIZER_UNLOCKED;
 
 static uint8_t ref_counts[PERIPH_MODULE_MAX] = {0};
 
-IRAM_ATTR void periph_rcc_enter(void)
+void periph_rcc_enter(void)
 {
     portENTER_CRITICAL_SAFE(&periph_spinlock);
 }
 
-IRAM_ATTR void periph_rcc_exit(void)
+void periph_rcc_exit(void)
 {
     portEXIT_CRITICAL_SAFE(&periph_spinlock);
 }
 
-IRAM_ATTR uint8_t periph_rcc_acquire_enter(periph_module_t periph)
+uint8_t periph_rcc_acquire_enter(periph_module_t periph)
 {
     periph_rcc_enter();
     return ref_counts[periph];
 }
 
-IRAM_ATTR void periph_rcc_acquire_exit(periph_module_t periph, uint8_t ref_count)
+void periph_rcc_acquire_exit(periph_module_t periph, uint8_t ref_count)
 {
     ref_counts[periph] = ++ref_count;
     periph_rcc_exit();
 }
 
-IRAM_ATTR uint8_t periph_rcc_release_enter(periph_module_t periph)
+uint8_t periph_rcc_release_enter(periph_module_t periph)
 {
     periph_rcc_enter();
     return ref_counts[periph] - 1;
 }
 
-IRAM_ATTR void periph_rcc_release_exit(periph_module_t periph, uint8_t ref_count)
+void periph_rcc_release_exit(periph_module_t periph, uint8_t ref_count)
 {
     ref_counts[periph] = ref_count;
     periph_rcc_exit();

components/esp_hw_support/port/esp32/rtc_sleep.c

@@ -65,7 +65,7 @@ typedef struct {
  * Configure whether certain peripherals are powered down in deep sleep
  * @param cfg power down flags as rtc_sleep_pd_config_t structure
  */
-static void rtc_sleep_pd(rtc_sleep_pd_config_t cfg)
+void rtc_sleep_pd(rtc_sleep_pd_config_t cfg)
 {
     REG_SET_FIELD(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_LSLP_MEM_FORCE_PU, ~cfg.dig_pd);
     REG_SET_FIELD(RTC_CNTL_PWC_REG, RTC_CNTL_SLOWMEM_FORCE_LPU, ~cfg.rtc_pd);
@@ -345,7 +345,7 @@ uint32_t rtc_deep_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt)
     return rtc_sleep_finish();
 }
 
-static uint32_t rtc_sleep_finish(void)
+static IRAM_ATTR uint32_t rtc_sleep_finish(void)
 {
     /* In deep sleep mode, we never get here */
     uint32_t reject = REG_GET_FIELD(RTC_CNTL_INT_RAW_REG, RTC_CNTL_SLP_REJECT_INT_RAW);

components/esp_hw_support/port/esp32c2/rtc_sleep.c

@@ -222,7 +222,7 @@ uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp
     return rtc_sleep_finish(lslp_mem_inf_fpu);
 }
 
-static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu)
+static IRAM_ATTR uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu)
 {
     /* In deep sleep mode, we never get here */
     uint32_t reject = REG_GET_FIELD(RTC_CNTL_INT_RAW_REG, RTC_CNTL_SLP_REJECT_INT_RAW);

components/esp_hw_support/port/esp32c3/rtc_sleep.c

@@ -352,7 +352,7 @@ uint32_t rtc_deep_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt)
     return rtc_sleep_finish(0);
 }
 
-static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu)
+static IRAM_ATTR uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu)
 {
     /* In deep sleep mode, we never get here */
     uint32_t reject = REG_GET_FIELD(RTC_CNTL_INT_RAW_REG, RTC_CNTL_SLP_REJECT_INT_RAW);