ci(hal): Extend the PMS hal test-app for verifying TEE-based interrupt scenarios

Author: laukik-hase

.gitlab/CODEOWNERS

@@ -128,7 +128,7 @@
 /components/freertos/                 @esp-idf-codeowners/system
 /components/hal/                      @esp-idf-codeowners/peripherals
 /components/hal/test_apps/crypto/     @esp-idf-codeowners/peripherals @esp-idf-codeowners/security
-/components/hal/test_apps/tee_apm/    @esp-idf-codeowners/peripherals @esp-idf-codeowners/security
+/components/hal/test_apps/tee/        @esp-idf-codeowners/peripherals @esp-idf-codeowners/security
 /components/heap/                     @esp-idf-codeowners/system
 /components/http_parser/              @esp-idf-codeowners/app-utilities
 /components/idf_test/                 @esp-idf-codeowners/peripherals @esp-idf-codeowners/system

components/hal/.build-test-rules.yml

@@ -12,6 +12,6 @@ components/hal/test_apps/hal_utils:
   enable:
     - if: IDF_TARGET == "linux"
 
-components/hal/test_apps/tee_apm:
+components/hal/test_apps/tee:
   disable:
     - if: IDF_TARGET not in ["esp32c6", "esp32h2", "esp32c5", "esp32c61"]

components/hal/test_apps/tee_apm/CMakeLists.txt renamed to components/hal/test_apps/tee/CMakeLists.txt

@@ -6,7 +6,7 @@ set(COMPONENTS main)
 
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
 
-project(test_tee_apm)
+project(test_tee_pms_cpu_intr)
 
 include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
 message(STATUS "Checking tee/apm registers are not read-write by half-word")

components/hal/test_apps/tee_apm/README.md renamed to components/hal/test_apps/tee/README.md

@@ -1,15 +1,21 @@
 | Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 |
 | ----------------- | -------- | -------- | --------- | -------- |
 
-# APM (Access Permission Management) Peripheral Test App
+# TEE (Trusted Execution Environment) Test Application
 
-This application validates region-based memory and peripheral access control via the APM (Access Permission Management) subsystem. It is primarily intended for bring-up and SoC-level functional testing.
+This application is designed to validate the key components of the **ESP-TEE** framework, with a focus on:
 
-Tests exercise various master-to-region accesses under different security modes (`TEE`, `REE0`, `REE1`, `REE2`). Outcomes are validated against expected APM behavior and known SoC-specific quirks.
+1. **Permission Management (PMS: TEE controller + APM module)**
+   - Region-based memory and peripheral access control using the TEE controller and the Access Permission Management (APM) module
+
+2. **Interrupts**
+   - Interrupt handling in Machine mode (M), User mode (U), and cross-mode contexts
+
+It is primarily intended for early bring-up and SoC-level functional validation.
 
 ---
 
-## Test Coverage
+## Test Coverage: PMS (TEE + APM module)
 
 ### TEE mode default access behavior
 
@@ -51,6 +57,13 @@ Validates the per-peripheral access permissions for all security modes.
 
 ---
 
+## Test Coverage: Interrupts
+
+- **M-mode interrupts in M-mode**
+- **U-mode interrupts in U-mode**
+- **M-mode interrupts in U-mode**
+- **U-mode interrupts in M-mode**
+
 ## Target Extension Guide
 
 To add support for a new SoC target, create a test configuration header at:

components/hal/test_apps/tee_apm/components/pms/CMakeLists.txt renamed to components/hal/test_apps/tee/components/pms_and_cpu_intr/CMakeLists.txt

@@ -1,14 +1,21 @@
 cmake_minimum_required(VERSION 3.16)
 idf_build_get_property(target IDF_TARGET)
 
-set(srcs "src/test_tee_vectors.S"
-         "src/test_panic_handler.c"
-         "src/test_intr_utils.c"
-         "src/test_apm_utils.c"
-         "src/test_setup_utils.c"
-         "src/test_tee_sys_apm.c")
-if(CONFIG_SOC_APM_SUPPORT_TEE_PERI_ACCESS_CTRL)
-    list(APPEND srcs "src/test_tee_peri_apm.c")
+set(srcs "src/common/test_apm_utils.c"
+         "src/common/test_intr_utils.c"
+         "src/common/test_setup_utils.c"
+         "src/common/test_panic_handler.c")
+
+list(APPEND srcs "src/pms/test_tee_sys_apm.c"
+                 "src/pms/test_tee_vectors.S")
+if(CONFIG_SOC_SUPPORT_TEE_PERI_APM_TEST)
+    list(APPEND srcs "src/pms/test_tee_peri_apm.c")
+endif()
+
+if(CONFIG_SOC_SUPPORT_TEE_INTR_TEST)
+    list(APPEND srcs "src/cpu_intr/test_interrupt.c"
+                     "src/cpu_intr/test_vectors_m.S"
+                     "src/cpu_intr/test_vectors_u.S")
 endif()
 
 idf_component_register(SRCS "${srcs}"
@@ -20,6 +27,5 @@ idf_component_register(SRCS "${srcs}"
 if(CONFIG_ULP_COPROC_ENABLED)
     set(ulp_app_name ulp_lp_core_${COMPONENT_NAME})
     set(ulp_rv_srcs "src/ulp/ulp_lp_core_main.c" "src/ulp/ulp_vectors.S")
-    set(ulp_exp_dep_srcs "src/test_tee_apm_pms.c")
     ulp_embed_binary(${ulp_app_name} "${ulp_rv_srcs}" "${ulp_exp_dep_srcs}")
 endif()

components/hal/test_apps/tee/components/pms_and_cpu_intr/Kconfig

@@ -0,0 +1,18 @@
+menu "Test-app related"
+
+    config SOC_SUPPORT_TEE_SYS_APM_TEST
+        bool
+        depends on SOC_APM_CTRL_FILTER_SUPPORTED
+        default y
+
+    config SOC_SUPPORT_TEE_PERI_APM_TEST
+        bool
+        depends on SOC_APM_SUPPORT_TEE_PERI_ACCESS_CTRL
+        default y
+
+    config SOC_SUPPORT_TEE_INTR_TEST
+        bool
+        depends on IDF_TARGET_ESP32C5 || IDF_TARGET_ESP32C61
+        default y
+
+endmenu

components/hal/test_apps/tee/components/pms_and_cpu_intr/include/test_cpu_intr.h

@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+/* Test-cases */
+void test_m_mode_intr_in_m_mode(void);
+
+void test_u_mode_intr_in_u_mode(void);
+
+void test_m_mode_intr_in_u_mode(void);
+
+void test_u_mode_intr_in_m_mode(void);

components/hal/test_apps/tee_apm/components/pms/include/test_pms.h renamed to components/hal/test_apps/tee/components/pms_and_cpu_intr/include/test_pms.h

@@ -1,5 +1,5 @@
-[mapping:pms]
-archive: libpms.a
+[mapping:test_pms_and_cpu_intr]
+archive: libpms_and_cpu_intr.a
 entries:
     test_intr_utils (noflash)
     test_panic_handler (noflash)

components/hal/test_apps/tee_apm/components/pms/linker.lf renamed to components/hal/test_apps/tee/components/pms_and_cpu_intr/linker.lf

@@ -0,0 +1,16 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define TEST_INTR_NUM_PASS_IN_SEC  (31)
+
+#ifndef __ASSEMBLER__
+#include "soc/interrupts.h"
+
+#define TG0_T0_INTR_SRC             (ETS_TG0_T0_LEVEL_INTR_SOURCE)
+#define CPU_FROM_CPU_N_INTR_SRC(n)  (ETS_FROM_CPU_INTR0_SOURCE + n)
+#endif