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Merge branch 'fix/fix_bad_submode_setting_in_rtc_slow_selection' into 'master'
fix(esp_hw_support): fix bad submode setting in rtc slow selection Closes IDFGH-13745 See merge request espressif/esp-idf!33754
2 parents 4fcc867 + 5971155 commit 49d080e

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6 files changed

+27
-6
lines changed

6 files changed

+27
-6
lines changed

components/esp_hw_support/port/esp32/rtc_clk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -279,7 +279,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
279279
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
280280
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
281281
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
282-
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
282+
} else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
283283
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
284284
}
285285
#endif

components/esp_hw_support/port/esp32c2/rtc_clk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
7272
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
7373
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
7474
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
75-
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
75+
} else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
7676
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
7777
}
7878
#endif

components/esp_hw_support/port/esp32c3/rtc_clk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
105105
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
106106
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
107107
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
108-
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
108+
} else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
109109
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
110110
}
111111
#endif

components/esp_hw_support/port/esp32s2/rtc_clk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
180180
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
181181
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
182182
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
183-
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
183+
} else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
184184
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
185185
}
186186
#endif

components/esp_hw_support/port/esp32s3/rtc_clk.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src)
120120
// Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256.
121121
if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256
122122
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true);
123-
} else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
123+
} else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256
124124
esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false);
125125
}
126126
#endif

components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c

Lines changed: 22 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -24,6 +24,7 @@
2424
#include "esp_rom_sys.h"
2525
#include "esp_rom_uart.h"
2626
#include "test_utils.h"
27+
#include "esp_random.h"
2728
#include "esp_sleep.h"
2829
#include "esp_system.h"
2930
#include "esp_private/esp_clk.h"
@@ -119,6 +120,26 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]")
119120
#endif
120121
}
121122

123+
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
124+
TEST_CASE("Test RTC_SLOW_CLK sources switching", "[rtc_clk]")
125+
{
126+
soc_rtc_slow_clk_src_t clk_src_before_switch = rtc_clk_slow_src_get();
127+
soc_rtc_slow_clk_src_t switching_sources[] = {SOC_RTC_SLOW_CLK_SRC_RC_SLOW, SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256};
128+
129+
for (uint32_t test_cnt = 0; test_cnt < 100; test_cnt++) {
130+
uint32_t src_id = esp_random() % 2;
131+
if (switching_sources[src_id] == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) {
132+
rtc_clk_8m_enable(true, true);
133+
}
134+
rtc_clk_slow_src_set(switching_sources[src_id]);
135+
esp_rom_delay_us(10*1000);
136+
TEST_ASSERT_EQUAL(switching_sources[src_id], rtc_clk_slow_src_get());
137+
}
138+
rtc_clk_slow_src_set(clk_src_before_switch);
139+
printf("done\n");
140+
}
141+
#endif
142+
122143
/* The following two are not unit tests, but are added here to make it easy to
123144
* check the frequency of 150k/32k oscillators. The following two "tests" will
124145
* output either 32k or 150k clock to GPIO25.

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