chore(soc): checked P4-ECO5 regsiters for dw_gdma,timg,etm,dsi

chore(mipi_dsi): checked the register on P4 ECO5

checked timg and etm registers

Author: suda-morris

components/soc/esp32p4/include/soc/soc.h

@@ -19,7 +19,6 @@
 #define REG_UHCI_BASE(i)                        (DR_REG_UHCI0_BASE)                      // only one UHCI on C6
 #define REG_UART_BASE(i)                        (DR_REG_UART_BASE + (i) * 0x1000)        // UART0 and UART1
 #define UART_FIFO_AHB_REG(i)                    (REG_UART_BASE(i) + 0x0)
-#define REG_TIMG_BASE(i)                        (DR_REG_TIMERGROUP0_BASE + (i) * 0x1000) // TIMERG0 and TIMERG1
 #define REG_SPI_MEM_BASE(i)                     (DR_REG_FLASH_SPI0_BASE + (i) * 0x1000)  // SPIMEM0 and SPIMEM1
 #define REG_SPI_BASE(i)                         (((i)>=2) ? (DR_REG_SPI2_BASE + (i-2) * 0x1000) : (0))    // GPSPI2 and GPSPI3
 #define REG_I2C_BASE(i)                         (DR_REG_I2C0_BASE + (i) * 0x1000)

components/soc/esp32p4/register/hw_ver1/soc/timer_group_reg.h

@@ -11,6 +11,8 @@
 extern "C" {
 #endif
 
+#define REG_TIMG_BASE(i)  (DR_REG_TIMG0_BASE + (i) * 0x1000)
+
 /** TIMG_T0CONFIG_REG register
  *  Timer 0 configuration register
  */