@@ -27,7 +27,9 @@ struct ana_cmpr_t {
2727 uint32_t intr_mask ; /*!< Interrupt mask */
2828 int intr_priority ; /*!< Interrupt priority */
2929 uint32_t src_clk_freq_hz ; /*!< Source clock frequency of the Analog Comparator unit */
30+ #if CONFIG_PM_ENABLE
3031 esp_pm_lock_handle_t pm_lock ; /*!< The Power Management lock that used to avoid unexpected power down of the clock domain */
32+ #endif
3133};
3234
3335/* Helper macros */
@@ -80,9 +82,11 @@ static esp_err_t s_ana_cmpr_init_gpio(ana_cmpr_handle_t cmpr, bool is_external_r
8082
8183static void ana_cmpr_destroy_unit (ana_cmpr_handle_t cmpr )
8284{
85+ #if CONFIG_PM_ENABLE
8386 if (cmpr -> pm_lock ) {
8487 esp_pm_lock_delete (cmpr -> pm_lock );
8588 }
89+ #endif
8690 if (cmpr -> intr_handle ) {
8791 esp_intr_free (cmpr -> intr_handle );
8892 }
@@ -274,9 +278,11 @@ esp_err_t ana_cmpr_enable(ana_cmpr_handle_t cmpr)
274278 ANA_CMPR_NULL_POINTER_CHECK (cmpr );
275279 ana_cmpr_fsm_t expected_fsm = ANA_CMPR_FSM_INIT ;
276280 if (atomic_compare_exchange_strong (& cmpr -> fsm , & expected_fsm , ANA_CMPR_FSM_WAIT )) {
281+ #if CONFIG_PM_ENABLE
277282 if (cmpr -> pm_lock ) {
278283 esp_pm_lock_acquire (cmpr -> pm_lock );
279284 }
285+ #endif
280286
281287 // the underlying register may be accessed by different threads at the same time, so use spin lock to protect it
282288 portENTER_CRITICAL (& s_spinlock );
@@ -305,9 +311,11 @@ esp_err_t ana_cmpr_disable(ana_cmpr_handle_t cmpr)
305311 analog_cmpr_ll_enable (cmpr -> dev , false);
306312 portEXIT_CRITICAL (& s_spinlock );
307313
314+ #if CONFIG_PM_ENABLE
308315 if (cmpr -> pm_lock ) {
309316 esp_pm_lock_release (cmpr -> pm_lock );
310317 }
318+ #endif
311319
312320 // switch the state machine to init state
313321 atomic_store (& cmpr -> fsm , ANA_CMPR_FSM_INIT );
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