Merge branch 'bugfix/h2_ble_timer_clk_enable_fix' into 'master'

Isl2017 · Isl2017 · commit 66927480c91a · 2025-01-16T17:20:38.000+08:00
fix: H2 ble timer clk enable issue.

See merge request espressif/esp-idf!36316
diff --git a/components/hal/esp32h2/include/hal/modem_syscon_ll.h b/components/hal/esp32h2/include/hal/modem_syscon_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -60,15 +60,10 @@ static inline void modem_syscon_ll_enable_modem_sec_clock(modem_syscon_dev_t *hw
     hw->clk_conf.clk_modem_sec_apb_en = en;
 }
 
-__attribute__((always_inline))
-static inline void modem_syscon_ll_enable_ble_timer_apb(modem_syscon_dev_t *hw, bool en)
-{
-    hw->clk_conf.clk_ble_timer_apb_en = en;
-}
-
 __attribute__((always_inline))
 static inline void modem_syscon_ll_enable_ble_timer_clock(modem_syscon_dev_t *hw, bool en)
 {
+    hw->clk_conf.clk_ble_timer_apb_en = en;
     hw->clk_conf.clk_ble_timer_en = en;
 }
 

Original file line number	Diff line number	Diff line change
`@@ -1,5 +1,5 @@`
`1`	`1`	`/*`
`2`		`- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD`
	`2`	`+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD`
`3`	`3`	`*`
`4`	`4`	`* SPDX-License-Identifier: Apache-2.0`
`5`	`5`	`*/`
`@@ -60,15 +60,10 @@ static inline void modem_syscon_ll_enable_modem_sec_clock(modem_syscon_dev_t *hw`
`60`	`60`	`hw->clk_conf.clk_modem_sec_apb_en = en;`
`61`	`61`	`}`
`62`	`62`
`63`		`-__attribute__((always_inline))`
`64`		`-static inline void modem_syscon_ll_enable_ble_timer_apb(modem_syscon_dev_t *hw, bool en)`
`65`		`-{`
`66`		`- hw->clk_conf.clk_ble_timer_apb_en = en;`
`67`		`-}`
`68`		`-`
`69`	`63`	`__attribute__((always_inline))`
`70`	`64`	`static inline void modem_syscon_ll_enable_ble_timer_clock(modem_syscon_dev_t *hw, bool en)`
`71`	`65`	`{`
	`66`	`+ hw->clk_conf.clk_ble_timer_apb_en = en;`
`72`	`67`	`hw->clk_conf.clk_ble_timer_en = en;`
`73`	`68`	`}`
`74`	`69`