feat(phy): support esp32c5 cert test

Author: muhaidong

components/esp_phy/include/esp_phy_cert_test.h

@@ -38,7 +38,6 @@ typedef enum {
     PHY_RATE_MCS5 = 0x15,
     PHY_RATE_MCS6 = 0x16,
     PHY_RATE_MCS7 = 0x17,
-#if CONFIG_SOC_WIFI_HE_SUPPORT
     // 11ax
     PHY_RATE_11AX_MCS0   = 0x20,
     PHY_RATE_11AX_MCS1   = 0x21,
@@ -50,7 +49,16 @@ typedef enum {
     PHY_RATE_11AX_MCS7   = 0x27,
     PHY_RATE_11AX_MCS8   = 0x28,
     PHY_RATE_11AX_MCS9   = 0x29,
-#endif//CONFIG_SOC_WIFI_HE_SUPPORT
+   //VHT
+    PHY_RATE_VHT_MCS0 = 0x30,
+    PHY_RATE_VHT_MCS1 = 0x31,
+    PHY_RATE_VHT_MCS2 = 0x32,
+    PHY_RATE_VHT_MCS3 = 0x33,
+    PHY_RATE_VHT_MCS4 = 0x34,
+    PHY_RATE_VHT_MCS5 = 0x35,
+    PHY_RATE_VHT_MCS6 = 0x36,
+    PHY_RATE_VHT_MCS7 = 0x37,
+    PHY_RATE_VHT_MCS8 = 0x38,
     PHY_WIFI_RATE_MAX
 } esp_phy_wifi_rate_t;
 

examples/phy/.build-test-rules.yml

@@ -11,6 +11,6 @@ examples/phy/cert_test:
   disable:
     - if: IDF_TARGET in ["esp32p4"]
       reason: not supported
-    - if: IDF_TARGET in ["esp32c5", "esp32c61", "esp32h21", "esp32h4"]
+    - if: IDF_TARGET in ["esp32c61", "esp32h21", "esp32h4"]
       temporary: true
       reason: not supported yet  # TODO: [ESP32C5] IDF-8851, [esp32c61] IDF-9859, [esp32h21] IDF-12041, [ESP32H4] IDF-12716

examples/phy/cert_test/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
 
 # Certification Test Example
 

examples/phy/cert_test/main/cmd_phy.c

@@ -42,6 +42,7 @@ static phy_gpio_output_set_t phy_gpio_output_set_args;
 #define arg_int1(_a, _b, _c, _d) arg_int1(NULL, NULL, _c, _d)
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
 static int esp_phy_tx_contin_en_func(int argc, char **argv)
 {
     int nerrors = arg_parse(argc, argv, (void **) &phy_args);
@@ -57,6 +58,7 @@ static int esp_phy_tx_contin_en_func(int argc, char **argv)
     }
     return 0;
 }
+#endif
 
 static int esp_phy_cmdstop_func(int argc, char **argv)
 {
@@ -518,6 +520,7 @@ void register_phy_cmd(void)
     phy_args.enable  = arg_int0(NULL, NULL, "<enable>", "enable");
     phy_args.end = arg_end(1);
 
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
     const esp_console_cmd_t tx_contin_cmd = {
         .command = "tx_contin_en",
         .help = "TX Continuous mode, 1: enable, 0: disable",
@@ -526,6 +529,7 @@ void register_phy_cmd(void)
         .argtable = &phy_args
     };
     ESP_ERROR_CHECK( esp_console_cmd_register(&tx_contin_cmd) );
+#endif
 
     const esp_console_cmd_t cmdstop_cmd = {
         .command = "cmdstop",