Merge branch 'feature/p4_eco5_real_chip' into 'master'

p4: p4 eco5 real chip

Closes IDF-13574 and IDF-13410

See merge request espressif/esp-idf!41396

Author: suda-morris

Kconfig

@@ -123,8 +123,6 @@ mainmenu "Espressif IoT Development Framework Configuration"
         bool
         default "y" if IDF_TARGET="esp32p4"
         select IDF_TARGET_ARCH_RISCV
-        select IDF_ENV_FPGA if ESP32P4_REV_MIN_200
-        select IDF_ENV_BRINGUP if ESP32P4_REV_MIN_200
 
     config IDF_TARGET_ESP32H2
         bool

components/bootloader/Kconfig.projbuild

@@ -43,7 +43,8 @@ menu "Bootloader config"
         int
         default 64 if IDF_TARGET_ESP32H2
         default 48 if IDF_TARGET_ESP32H21 || IDF_TARGET_ESP32H4
-        default 90 if IDF_TARGET_ESP32P4
+        default 90 if IDF_TARGET_ESP32P4 && ESP32P4_SELECTS_REV_LESS_V3
+        default 100 if IDF_TARGET_ESP32P4 && !ESP32P4_SELECTS_REV_LESS_V3
         default 80
         help
             The CPU clock frequency to be at least raised to in 2nd bootloader. Invisible for users.

components/bootloader/subproject/CMakeLists.txt

@@ -69,8 +69,8 @@ idf_build_set_property(__OUTPUT_SDKCONFIG 0)
 set(LD_DEFAULT_PATH "${CMAKE_CURRENT_SOURCE_DIR}/main/ld/${IDF_TARGET}")
 idf_build_set_property(BOOTLOADER_LINKER_SCRIPT "${LD_DEFAULT_PATH}/bootloader.rom.ld" APPEND)
 project(bootloader)
-if(CONFIG_ESP32P4_REV_MIN_200)
-    target_linker_script("__idf_main" INTERFACE "${LD_DEFAULT_PATH}/bootloader.rev2.ld")
+if(CONFIG_ESP32P4_REV_MIN_300)
+    target_linker_script("__idf_main" INTERFACE "${LD_DEFAULT_PATH}/bootloader.rev3.ld")
 else()
     target_linker_script("__idf_main" INTERFACE "${LD_DEFAULT_PATH}/bootloader.ld")
 endif()

components/bootloader/subproject/main/ld/esp32p4/bootloader.rev2.ld renamed to components/bootloader/subproject/main/ld/esp32p4/bootloader.rev3.ld

@@ -224,6 +224,7 @@ static void bootloader_spi_flash_resume(void)
 
 esp_err_t bootloader_init_spi_flash(void)
 {
+    bootloader_init_mspi_clock();
     bootloader_init_flash_configure();
 
 #if CONFIG_BOOTLOADER_FLASH_DC_AWARE

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c

@@ -386,7 +386,7 @@ static esp_err_t verify_image_header(uint32_t src_addr, const esp_image_header_t
 }
 
 #ifdef BOOTLOADER_BUILD
-#if CONFIG_IDF_TARGET_ESP32P4 && !CONFIG_ESP32P4_SELECTS_REV_LESS_V2
+#if CONFIG_IDF_TARGET_ESP32P4 && !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
 #define ROM_STACK_START         (SOC_ROM_STACK_START_REV2)
 #else
 #define ROM_STACK_START         (SOC_ROM_STACK_START)

components/bootloader_support/src/esp_image_format.c

@@ -255,7 +255,6 @@ menu "Hardware Settings"
     config ESP_BRINGUP_BYPASS_CPU_CLK_SETTING
         bool
         default y if !SOC_CLK_TREE_SUPPORTED
-        default y if ESP32P4_REV_MIN_200 # TODO: IDF-13574
         default n
         help
             This option is only used for new chip bringup, when
@@ -265,7 +264,6 @@ menu "Hardware Settings"
     config ESP_BRINGUP_BYPASS_RANDOM_SETTING
         bool
         default y if !SOC_RNG_SUPPORTED
-        default y if ESP32P4_REV_MIN_200 # TODO: IDF-13574
         default n
         help
             This option is only used for new chip bringup, when

components/esp_hw_support/Kconfig

@@ -1,13 +1,14 @@
-comment "NOTE! Support of ESP32-P4 rev. <2.0 and >=2.0 is mutually exclusive"
+comment "NOTE! Support of ESP32-P4 rev. <3.0 and >=3.0 is mutually exclusive"
 comment "Read the help text of the option below for explanation"
 
-config ESP32P4_SELECTS_REV_LESS_V2
-    bool "Select ESP32-P4 revisions <2.0 (No >=2.x Support)"
+config ESP32P4_SELECTS_REV_LESS_V3
+    bool "Select ESP32-P4 revisions <3.0 (No >=3.x Support)"
     default y
     help
         Select this option to support ESP32-P4 revisions 0.x and 1.x.
-        Revision 2.0 and revisions less than 2.0 have huge hardware difference.
-        Revisions higher than 2.0 (included) is not compatible with 0.x and 1.x.
+        Revisions higher than 3.0 (included) and revisions less than 3.0
+        have huge hardware difference.
+        Revisions higher than 3.0 (included) is not compatible with 0.x and 1.x.
 
 choice ESP32P4_REV_MIN
     prompt "Minimum Supported ESP32-P4 Revision"
@@ -21,26 +22,26 @@ choice ESP32P4_REV_MIN
         this will also help to reduce binary size.
 
     config ESP32P4_REV_MIN_0
-        depends on ESP32P4_SELECTS_REV_LESS_V2
+        depends on ESP32P4_SELECTS_REV_LESS_V3
         bool "Rev v0.0"
     config ESP32P4_REV_MIN_1
-        depends on ESP32P4_SELECTS_REV_LESS_V2
+        depends on ESP32P4_SELECTS_REV_LESS_V3
         bool "Rev v0.1"
     config ESP32P4_REV_MIN_100
-        depends on ESP32P4_SELECTS_REV_LESS_V2
+        depends on ESP32P4_SELECTS_REV_LESS_V3
         bool "Rev v1.0"
-    config ESP32P4_REV_MIN_200
-        bool "Rev v2.0"
-        depends on !ESP32P4_SELECTS_REV_LESS_V2
-        select ESPTOOLPY_NO_STUB if (IDF_ENV_FPGA || IDF_ENV_BRINGUP)
+    config ESP32P4_REV_MIN_300
+        bool "Rev v3.0"
+        depends on !ESP32P4_SELECTS_REV_LESS_V3
+        select ESPTOOLPY_NO_STUB # TODO: IDF-13911
 endchoice
 
 config ESP32P4_REV_MIN_FULL
     int
     default 0 if ESP32P4_REV_MIN_0
     default 1 if ESP32P4_REV_MIN_1
     default 100 if ESP32P4_REV_MIN_100
-    default 0 if ESP32P4_REV_MIN_200  # TODO: IDF-13410. To be updated to 200 when chip efuse is burnt
+    default 300 if ESP32P4_REV_MIN_300
 
 config ESP_REV_MIN_FULL
     int
@@ -50,15 +51,19 @@ config ESP_REV_MIN_FULL
     # MAX Revision
     #
 
-    comment "Maximum Supported ESP32-P4 Revision (Rev v2.99)"
+    comment "Maximum Supported ESP32-P4 Revision (Rev v1.99)"
+    depends on ESP32P4_SELECTS_REV_LESS_V3
+    comment "Maximum Supported ESP32-P4 Revision (Rev v3.99)"
+    depends on !ESP32P4_SELECTS_REV_LESS_V3
     # Maximum revision that IDF supports.
     # It can not be changed by user.
     # Only Espressif can change it when a new version will be supported in IDF.
     # Supports all chips starting from ESP32P4_REV_MIN_FULL to ESP32P4_REV_MAX_FULL
 
 config ESP32P4_REV_MAX_FULL
     int
-    default 199 #TODO: IDF-13574
+    default 399 if !ESP32P4_SELECTS_REV_LESS_V3
+    default 199 if ESP32P4_SELECTS_REV_LESS_V3
     # keep in sync the "Maximum Supported Revision" description with this value
 
 config ESP_REV_MAX_FULL
@@ -78,6 +83,6 @@ config ESP_EFUSE_BLOCK_REV_MIN_FULL
 
 config ESP_EFUSE_BLOCK_REV_MAX_FULL
     int
-    default 99
+    default 199
     comment "Maximum Supported ESP32-P4 eFuse Block Revision (eFuse Block Rev v0.99)"
     # The revision in the comment must correspond to the default value of ESP_EFUSE_BLOCK_REV_MAX_FULL

components/esp_hw_support/port/esp32p4/Kconfig.hw_support

@@ -336,7 +336,7 @@ uint32_t get_act_hp_dbias(void)
     uint32_t hp_cali_dbias = HP_CALI_ACTIVE_DBIAS_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t hp_cali_dbias_efuse = 0;
-    if (blk_version >= 2) {
+    if (blk_version >= 2 && blk_version < 100) {
         hp_cali_dbias_efuse = efuse_ll_get_active_hp_dbias();
     }
     if (hp_cali_dbias_efuse > 0) {
@@ -357,7 +357,7 @@ uint32_t get_act_lp_dbias(void)
     uint32_t lp_cali_dbias = LP_CALI_ACTIVE_DBIAS_DEFAULT;
     uint32_t blk_version = efuse_hal_blk_version();
     uint32_t lp_cali_dbias_efuse = 0;
-    if (blk_version >= 2) {
+    if (blk_version >= 2 && blk_version < 100) {
         lp_cali_dbias_efuse = efuse_ll_get_active_lp_dbias();
     }
     if (lp_cali_dbias_efuse > 0) {

components/esp_hw_support/port/esp32p4/pmu_param.c

@@ -33,7 +33,7 @@ static uint8_t get_lp_hp_gap(void)
     int8_t lp_hp_gap = 0;
     uint32_t blk_version = efuse_hal_blk_version();
     uint8_t lp_hp_gap_efuse = 0;
-    if (blk_version >= 2) {
+    if (blk_version >= 2 && blk_version < 100) {
         lp_hp_gap_efuse = efuse_ll_get_dbias_vol_gap();
         bool gap_flag = lp_hp_gap_efuse >> 4;
         uint8_t gap_abs_value = lp_hp_gap_efuse & 0xf;
@@ -77,7 +77,7 @@ static uint32_t pvt_get_lp_dbias(void)
 void pvt_auto_dbias_init(void)
 {
     uint32_t blk_version = efuse_hal_blk_version();
-    if (blk_version >= 2) {
+    if (blk_version >= 2 && blk_version < 100) {
         SET_PERI_REG_MASK(HP_SYS_CLKRST_REF_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_REF_160M_CLK_EN);
         SET_PERI_REG_MASK(HP_SYS_CLKRST_SOC_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_PVT_SYS_CLK_EN);
         /*config for dbias func*/
@@ -120,7 +120,7 @@ void pvt_auto_dbias_init(void)
 void pvt_func_enable(bool enable)
 {
     uint32_t blk_version = efuse_hal_blk_version();
-    if (blk_version >= 2){
+    if (blk_version >= 2 && blk_version < 100){
 
         if (enable) {
             SET_PERI_REG_MASK(HP_SYS_CLKRST_REF_CLK_CTRL2_REG, HP_SYS_CLKRST_REG_REF_160M_CLK_EN);