Skip to content

Commit 78faa25

Browse files
Harshal5Harshal5
committed
Merge branch 'feat/support_key_manager_esp32c5' into 'master'
Support key manager esp32c5 Closes IDF-12626, IDF-12628, IDF-12629, IDF-8621, IDF-9007, IDF-12855, IDF-9070, IDF-7902, and IDF-7548 See merge request espressif/esp-idf!38894
2 parents 5aff8a9 + bba1448 commit 78faa25

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

62 files changed

+3385
-2857
lines changed

‎components/bootloader_support/src/esp32c5/flash_encryption_secure_features.c‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -71,12 +71,9 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
7171

7272
esp_err_t esp_flash_encryption_enable_key_mgr(void)
7373
{
74-
// Enable and reset key manager
75-
// To suppress build errors about spinlock's __DECLARE_RCC_ATOMIC_ENV
76-
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
77-
key_mgr_ll_enable_bus_clock(true);
78-
key_mgr_ll_enable_peripheral_clock(true);
79-
key_mgr_ll_reset_register();
74+
_key_mgr_ll_enable_bus_clock(true);
75+
_key_mgr_ll_enable_peripheral_clock(true);
76+
_key_mgr_ll_reset_register();
8077

8178
while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
8279
};

‎components/bootloader_support/src/esp32p4/flash_encryption_secure_features.c‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -53,12 +53,9 @@ esp_err_t esp_flash_encryption_enable_secure_features(void)
5353

5454
esp_err_t esp_flash_encryption_enable_key_mgr(void)
5555
{
56-
// Enable and reset key manager
57-
// To suppress build errors about spinlock's __DECLARE_RCC_ATOMIC_ENV
58-
int __DECLARE_RCC_ATOMIC_ENV __attribute__ ((unused));
59-
key_mgr_ll_enable_bus_clock(true);
60-
key_mgr_ll_enable_peripheral_clock(true);
61-
key_mgr_ll_reset_register();
56+
_key_mgr_ll_enable_bus_clock(true);
57+
_key_mgr_ll_enable_peripheral_clock(true);
58+
_key_mgr_ll_reset_register();
6259

6360
while (key_mgr_ll_get_state() != ESP_KEY_MGR_STATE_IDLE) {
6461
};

‎components/esp_hw_support/include/esp_crypto_lock.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/

‎components/esp_hw_support/include/esp_hmac.h‎

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -9,6 +9,7 @@
99
#include <stdbool.h>
1010
#include "esp_err.h"
1111
#include "soc/soc_caps.h"
12+
#include "hal/hmac_types.h"
1213

1314
#if !SOC_HMAC_SUPPORTED && !CI_HEADER_CHECK
1415
#error "HMAC peripheral is not supported for the selected target"
@@ -18,19 +19,6 @@
1819
extern "C" {
1920
#endif
2021

21-
/**
22-
* The possible efuse keys for the HMAC peripheral
23-
*/
24-
typedef enum {
25-
HMAC_KEY0 = 0,
26-
HMAC_KEY1,
27-
HMAC_KEY2,
28-
HMAC_KEY3,
29-
HMAC_KEY4,
30-
HMAC_KEY5,
31-
HMAC_KEY_MAX
32-
} hmac_key_id_t;
33-
3422
/**
3523
* @brief
3624
* Calculate the HMAC of a given message.

‎components/esp_rom/esp32c5/include/esp32c5/rom/key_mgr.h‎

Lines changed: 115 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,115 @@
1+
/*
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#pragma once
8+
9+
#include "soc/soc_caps.h"
10+
11+
#if SOC_KEY_MANAGER_SUPPORTED
12+
13+
#include "rom/ets_sys.h"
14+
#include "esp_attr.h"
15+
#include <stdint.h>
16+
#include "rom/km.h"
17+
18+
#if __cplusplus
19+
extern "C" {
20+
#endif
21+
22+
// store huk info, occupy 96 words
23+
struct huk_info {
24+
// store huk info, occupy 165 words
25+
#define HUK_INFO_LEN 660
26+
27+
uint8_t info[HUK_INFO_LEN];
28+
uint32_t crc;
29+
} PACKED_ATTR;
30+
31+
// store key info, occupy 512 bits
32+
struct key_info {
33+
#define KEY_INFO_LEN 64
34+
uint8_t info[KEY_INFO_LEN];
35+
uint32_t crc;
36+
} PACKED_ATTR;
37+
38+
struct huk_key_block {
39+
#define KEY_HUK_SECTOR_MAGIC 0xDEA5CE5A
40+
uint32_t magic;
41+
uint32_t version; // for backward compatibility
42+
uint8_t reserved[16];
43+
struct huk_info huk_info;
44+
struct key_info key_info[2]; // at most 2 key info (XTS-512_1 and XTS-512_2), at least use 1
45+
} WORD_ALIGNED_ATTR PACKED_ATTR;
46+
47+
/*
48+
* We define two info sectors "active" and "backup" here
49+
* Most rom code would rely only on the "active" sector for the key information
50+
*
51+
* But there could be a situation where the huk and key information must be regenerated
52+
* based on ageing and other factors. For that scenario, we need a "backup" sector
53+
*/
54+
#define KEY_HUK_SECTOR_OFFSET(i) ((i)*0x1000)
55+
#define ACTIVE_SECTOR_OFFSET KEY_HUK_SECTOR_OFFSET(0)
56+
#define BACKUP_SECTOR_OFFSET KEY_HUK_SECTOR_OFFSET(1)
57+
58+
#define KM_PERI_ECDSA (BIT(0))
59+
#define KM_PERI_XTS (BIT(1))
60+
61+
struct km_deploy_ops {
62+
#define KM_KEY_PURPOSE_ECDSA_KEY_192 1
63+
#define KM_KEY_PURPOSE_ECDSA_KEY_256 2
64+
#define KM_KEY_PURPOSE_FLASH_XTS_256_1 3
65+
#define KM_KEY_PURPOSE_FLASH_XTS_256_2 4
66+
#define KM_KEY_PURPOSE_FLASH_XTS_128 5
67+
#define KM_KEY_PURPOSE_HMAC 6
68+
#define KM_KEY_PURPOSE_DS 7
69+
#define KM_KEY_PURPOSE_PSRAM_XTS_256_1 8
70+
#define KM_KEY_PURPOSE_PSRAM_XTS_256_2 9
71+
#define KM_KEY_PURPOSE_PSRAM_XTS_128 10
72+
#define KM_KEY_PURPOSE_ECDSA_KEY_384_L 11
73+
#define KM_KEY_PURPOSE_ECDSA_KEY_384_H 12
74+
int km_key_purpose;
75+
#define KM_DEPLOY_MODE_RANDOM 0
76+
#define KM_DEPLOY_MODE_AES 1
77+
#define KM_DEPLOY_MODE_ECDH0 2
78+
#define KM_DEPLOY_MODE_ECDH1 3
79+
#define KM_DEPLOY_MODE_RECOVER 4
80+
#define KM_DEPLOY_MODE_EXPORT 5
81+
int deploy_mode;
82+
uint8_t *init_key; // 256 bits, only used in aes and ecdh1 deploy mode
83+
int deploy_only_once;
84+
int force_use_km_key;
85+
int km_use_efuse_key;
86+
uint32_t efuse_km_rnd_switch_cycle; // 0 means use default
87+
uint32_t km_rnd_switch_cycle; // 0 means use default
88+
int km_use_sw_init_key;
89+
struct huk_info *huk_info;
90+
struct key_info *key_info;
91+
};
92+
93+
/* state of km */
94+
#define KM_STATE_IDLE 0
95+
#define KM_STATE_LOAD 1
96+
#define KM_STATE_GAIN 2
97+
#define KM_STATE_BUSY 3
98+
#define KM_STATE_INVALID 4
99+
100+
/* state of huk generator
101+
* values defined same as km
102+
*/
103+
#define HUK_STATE_IDLE 0
104+
#define HUK_STATE_LOAD 1
105+
#define HUK_STATE_GAIN 2
106+
#define HUK_STATE_BUSY 3
107+
108+
#define HUK_NOT_GENERATED 0
109+
#define HUK_GEN_VALID 1
110+
#define HUK_GEN_INVALID 2
111+
112+
#if __cplusplus
113+
}
114+
#endif
115+
#endif

‎components/esp_security/include/esp_key_mgr.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ extern "C" {
2222
#define KEY_MGR_ASSIST_INFO_SIZE 64
2323
#define KEY_MGR_KEY_RECOVERY_INFO_SIZE 64
2424

25-
#define KEY_MGR_HUK_INFO_SIZE HUK_INFO_SIZE
25+
#define KEY_MGR_HUK_INFO_SIZE HUK_INFO_LEN
2626
#define KEY_MGR_HUK_RISK_ALERT_LEVEL HUK_RISK_ALERT_LEVEL
2727

2828
/* AES deploy mode */

‎components/esp_security/src/esp_crypto_periph_clk.c‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,10 @@ void esp_crypto_mpi_enable_periph_clk(bool enable)
8080
MPI_RCC_ATOMIC() {
8181
mpi_ll_enable_bus_clock(enable);
8282
if (enable) {
83+
mpi_ll_power_up();
8384
mpi_ll_reset_register();
85+
} else {
86+
mpi_ll_power_down();
8487
}
8588
}
8689
}
@@ -141,9 +144,12 @@ void esp_crypto_ecdsa_enable_periph_clk(bool enable)
141144
void esp_crypto_key_mgr_enable_periph_clk(bool enable)
142145
{
143146
KEY_MANAGER_RCC_ATOMIC() {
147+
key_mgr_ll_power_up();
144148
key_mgr_ll_enable_bus_clock(enable);
145149
key_mgr_ll_enable_peripheral_clock(enable);
146-
key_mgr_ll_reset_register();
150+
if (enable) {
151+
key_mgr_ll_reset_register();
152+
}
147153
}
148154
}
149155
#endif

‎components/esp_security/src/esp_ds.c‎

Lines changed: 27 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "esp_cpu.h"
1818
#endif
1919

20+
#include "soc/soc_caps.h"
2021
#include "esp_ds.h"
2122
#include "esp_crypto_lock.h"
2223
#include "esp_crypto_periph_clk.h"
@@ -37,6 +38,10 @@
3738
#include "hal/sha_ll.h"
3839
#endif /* !CONFIG_IDF_TARGET_ESP32S2 */
3940

41+
#ifdef SOC_KEY_MANAGER_DS_KEY_DEPLOY
42+
#include "hal/key_mgr_hal.h"
43+
#endif
44+
4045
/**
4146
* The vtask delay \c esp_ds_sign() is using while waiting for completion of the signing operation.
4247
*/
@@ -247,22 +252,16 @@ static void ds_acquire_enable(void)
247252

248253
// We also enable SHA and HMAC here. SHA is used by HMAC, HMAC is used by DS.
249254
esp_crypto_hmac_enable_periph_clk(true);
250-
251255
esp_crypto_sha_enable_periph_clk(true);
252-
256+
esp_crypto_mpi_enable_periph_clk(true);
253257
esp_crypto_ds_enable_periph_clk(true);
254-
255-
hmac_hal_start();
256258
}
257259

258260
static void ds_disable_release(void)
259261
{
260-
ds_hal_finish();
261-
262262
esp_crypto_ds_enable_periph_clk(false);
263-
263+
esp_crypto_mpi_enable_periph_clk(false);
264264
esp_crypto_sha_enable_periph_clk(false);
265-
266265
esp_crypto_hmac_enable_periph_clk(false);
267266

268267
esp_crypto_ds_lock_release();
@@ -326,19 +325,32 @@ esp_err_t esp_ds_start_sign(const void *message,
326325

327326
ds_acquire_enable();
328327

329-
// initiate hmac
330-
uint32_t conf_error = hmac_hal_configure(HMAC_OUTPUT_DS, key_id);
331-
if (conf_error) {
332-
ds_disable_release();
333-
return ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL;
328+
#if SOC_KEY_MANAGER_DS_KEY_DEPLOY
329+
if (key_id == HMAC_KEY_KM) {
330+
key_mgr_hal_set_key_usage(ESP_KEY_MGR_DS_KEY, ESP_KEY_MGR_USE_OWN_KEY);
331+
ds_hal_set_key_source(DS_KEY_SOURCE_KEY_MGR);
332+
} else {
333+
key_mgr_hal_set_key_usage(ESP_KEY_MGR_DS_KEY, ESP_KEY_MGR_USE_EFUSE_KEY);
334+
ds_hal_set_key_source(DS_KEY_SOURCE_EFUSE);
335+
#endif
336+
// initiate hmac
337+
hmac_hal_start();
338+
uint32_t conf_error = hmac_hal_configure(HMAC_OUTPUT_DS, key_id);
339+
if (conf_error) {
340+
ds_disable_release();
341+
return ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL;
342+
}
343+
#if SOC_KEY_MANAGER_DS_KEY_DEPLOY
334344
}
345+
#endif
335346

336347
ds_hal_start();
337348

338349
// check encryption key from HMAC
339350
int64_t start_time = get_time_us();
340351
while (ds_ll_busy() != 0) {
341352
if ((get_time_us() - start_time) > SOC_DS_KEY_CHECK_MAX_WAIT_US) {
353+
ds_hal_finish();
342354
ds_disable_release();
343355
return ESP_ERR_HW_CRYPTO_DS_INVALID_KEY;
344356
}
@@ -348,6 +360,7 @@ esp_err_t esp_ds_start_sign(const void *message,
348360
*esp_ds_ctx = malloc(sizeof(esp_ds_context_t));
349361
#endif
350362
if (!*esp_ds_ctx) {
363+
ds_hal_finish();
351364
ds_disable_release();
352365
return ESP_ERR_NO_MEM;
353366
}
@@ -398,6 +411,7 @@ esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
398411
#endif
399412

400413
hmac_hal_clean();
414+
ds_hal_finish();
401415

402416
ds_disable_release();
403417

0 commit comments

Comments
 (0)