2020#include "esp_check.h"
2121#include "esp_heap_caps.h"
2222#include "esp_cache.h"
23- #include "esp_dma_utils.h"
2423#include "esp_memory_utils.h"
2524
2625const static char * TAG = "bs_loop" ;
@@ -209,18 +208,21 @@ esp_err_t bitscrambler_loopback_run(bitscrambler_handle_t bs, void *buffer_in, s
209208 return ESP_ERR_INVALID_SIZE ;
210209 }
211210
212- //Casual check to see if the buffer is aligned to cache requirements.
213- esp_dma_mem_info_t dma_mem_info = {
214- .dma_alignment_bytes = 4
215- };
216- //Note: we know the size of the data, but not of the buffer that contains it, so we set length=0.
217- if (!esp_dma_is_buffer_alignment_satisfied (buffer_in , 0 , dma_mem_info )) {
218- ESP_LOGE (TAG , "buffer_in not aligned to DMA requirements" );
219- return ESP_ERR_INVALID_ARG ;
211+ int int_mem_cache_line_size = cache_hal_get_cache_line_size (CACHE_LL_LEVEL_INT_MEM , CACHE_TYPE_DATA );
212+ int ext_mem_cache_line_size = cache_hal_get_cache_line_size (CACHE_LL_LEVEL_EXT_MEM , CACHE_TYPE_DATA );
213+
214+ bool need_cache_sync = esp_ptr_internal (buffer_in ) ? (int_mem_cache_line_size > 0 ) : (ext_mem_cache_line_size > 0 );
215+ if (need_cache_sync ) {
216+ //Note: we add the ESP_CACHE_MSYNC_FLAG_UNALIGNED flag for now as otherwise esp_cache_msync will complain about
217+ //the size not being aligned... we miss out on a check to see if the address is aligned this way. This needs to
218+ //be improved, but potentially needs a fix in esp_cache_msync not to check the size.
219+ ESP_RETURN_ON_ERROR (esp_cache_msync (buffer_in , length_bytes_in , ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED ),
220+ TAG , "failed in cache sync for input buffer" );
220221 }
221- if (!esp_dma_is_buffer_alignment_satisfied (buffer_out , 0 , dma_mem_info )) {
222- ESP_LOGE (TAG , "buffer_out not aligned to DMA requirements" );
223- return ESP_ERR_INVALID_ARG ;
222+ need_cache_sync = esp_ptr_internal (buffer_out ) ? (int_mem_cache_line_size > 0 ) : (ext_mem_cache_line_size > 0 );
223+ if (need_cache_sync ) {
224+ ESP_RETURN_ON_ERROR (esp_cache_msync (buffer_out , length_bytes_out , ESP_CACHE_MSYNC_FLAG_DIR_M2C ),
225+ TAG , "failed in cache sync for output buffer" );
224226 }
225227
226228 gdma_reset (bsl -> rx_channel );
@@ -247,17 +249,6 @@ esp_err_t bitscrambler_loopback_run(bitscrambler_handle_t bs, void *buffer_in, s
247249 };
248250 gdma_link_mount_buffers (bsl -> rx_link_list , 0 , & out_buf_mount_config , 1 , NULL );
249251
250- int int_mem_cache_line_size = cache_hal_get_cache_line_size (CACHE_LL_LEVEL_INT_MEM , CACHE_TYPE_DATA );
251- int ext_mem_cache_line_size = cache_hal_get_cache_line_size (CACHE_LL_LEVEL_EXT_MEM , CACHE_TYPE_DATA );
252-
253- bool need_cache_sync = esp_ptr_internal (buffer_in ) ? (int_mem_cache_line_size > 0 ) : (ext_mem_cache_line_size > 0 );
254- if (need_cache_sync ) {
255- //Note: we add the ESP_CACHE_MSYNC_FLAG_UNALIGNED flag for now as otherwise esp_cache_msync will complain about
256- //the size not being aligned... we miss out on a check to see if the address is aligned this way. This needs to
257- //be improved, but potentially needs a fix in esp_cache_msync not to check the size.
258- esp_cache_msync (buffer_in , length_bytes_in , ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED );
259- }
260-
261252 gdma_start (bsl -> rx_channel , gdma_link_get_head_addr (bsl -> rx_link_list ));
262253 gdma_start (bsl -> tx_channel , gdma_link_get_head_addr (bsl -> tx_link_list ));
263254 bitscrambler_start (bs );
@@ -272,11 +263,6 @@ esp_err_t bitscrambler_loopback_run(bitscrambler_handle_t bs, void *buffer_in, s
272263 ret = ESP_ERR_TIMEOUT ;
273264 }
274265
275- need_cache_sync = esp_ptr_internal (buffer_out ) ? (int_mem_cache_line_size > 0 ) : (ext_mem_cache_line_size > 0 );
276- if (need_cache_sync ) {
277- esp_cache_msync (buffer_out , length_bytes_out , ESP_CACHE_MSYNC_FLAG_DIR_M2C );
278- }
279-
280266 if (bytes_written ) {
281267 * bytes_written = gdma_link_count_buffer_size_till_eof (bsl -> rx_link_list , 0 );
282268 }
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