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Icarus113Icarus113
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refactor(sd): updated sd host api to make 0 value as no change to configurations
use value 0 for `sd_host_slot_cfg_t` members, means no change to previous configurations, instead of using `override/valid` flag
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4 files changed

+38
-56
lines changed

4 files changed

+38
-56
lines changed

‎components/esp_driver_sd_intf/include/driver/sd_types.h‎

Lines changed: 9 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -29,35 +29,21 @@ typedef struct sd_slot_driver_t *sd_host_slot_handle_t;
2929
* @brief SD Host slot configuration
3030
*/
3131
typedef struct {
32-
struct {
33-
int freq_hz; ///< Frequency in Hz
34-
bool override; ///< If set to true, frequency will be set to freq_hz; If set to false, frequency is unchanged. By default it's false
35-
} freq; ///< Frequency settings
36-
struct {
37-
bool override; ///< If set to true, width will be set to width configured in `sd_host_sdmmc_slot_io_cfg_t`; If set to false, width is unchanged. By default it's false
38-
} width; ///< Bus width settings
39-
struct {
40-
sd_sampling_mode_t mode; ///< Sampling mode, see `sd_sampling_mode_t`
41-
bool override; ///< If set to true, sampling mode will be set to sampling_mode; If set to false, sampling mode is unchanged. By default it's false
42-
} sampling_mode; ///< Sampling mode settings
43-
struct {
44-
sdmmc_delay_phase_t delayphase; ///< Delay phase, see `sdmmc_delay_phase_t`
45-
bool override; ///< If set to true, delay phase will be set to delay_phase; If set to false, delay phase is unchanged. By default it's false
46-
} delay_phase; ///< Delay phase settings
47-
struct {
48-
sdmmc_delay_line_t delayline; ///< Delay line, see `sdmmc_delay_line_t`
49-
bool override; ///< If set to true, delay line will be set to delay_line; If set to false, delay line is unchanged. By default it's false
50-
} delay_line; ///< Delay line settings
32+
int freq_hz; ///< Frequency in Hz
33+
sd_bus_width_t width; ///< Bus width
34+
sd_sampling_mode_t sampling_mode; ///< Sampling mode, see `sd_sampling_mode_t`
35+
sdmmc_delay_phase_t delayphase; ///< Delay phase, see `sdmmc_delay_phase_t`
36+
sdmmc_delay_line_t delayline; ///< Delay line, see `sdmmc_delay_line_t`
5137
} sd_host_slot_cfg_t;
5238

5339
/**
5440
* @brief Slot info
5541
*/
5642
typedef struct {
57-
int freq_hz; ///< Frequency in Hz
58-
uint8_t width; ///< Bus width
59-
sd_mode_t sd_mode; ///< SD mode, see `sd_mode_t`
60-
sd_sampling_mode_t sampling_mode; ///< Sampling mode, see `sd_sampling_mode_t`
43+
int freq_hz; ///< Frequency in Hz
44+
sd_bus_width_t width; ///< Bus width
45+
sd_mode_t sd_mode; ///< SD mode, see `sd_mode_t`
46+
sd_sampling_mode_t sampling_mode; ///< Sampling mode, see `sd_sampling_mode_t`
6147
} sd_host_slot_info_t;
6248

6349
/*---------------------------------------------

‎components/esp_driver_sdmmc/legacy/src/sdmmc_host.c‎

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,7 @@ esp_err_t sdmmc_host_set_card_clk(int slot, uint32_t freq_khz)
3333

3434
sd_host_slot_handle_t hdl = sdmmc_get_slot_handle(slot);
3535
sd_host_slot_cfg_t cfg = {
36-
.freq.freq_hz = freq_khz * 1000,
37-
.freq.override = true,
36+
.freq_hz = freq_khz * 1000,
3837
};
3938
ESP_RETURN_ON_ERROR(sd_host_slot_configure(hdl, &cfg), TAG, "failed to configure slot freq");
4039

@@ -57,8 +56,7 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
5756
SLOT_CHECK(slot);
5857
sd_host_slot_handle_t hdl = sdmmc_get_slot_handle(slot);
5958
sd_host_slot_cfg_t cfg = {
60-
.delay_phase.delayphase = delay_phase,
61-
.delay_phase.override = true,
59+
.delayphase = delay_phase,
6260
};
6361
ESP_RETURN_ON_ERROR(sd_host_slot_configure(hdl, &cfg), TAG, "failed to configure slot delay phase");
6462

@@ -70,8 +68,7 @@ esp_err_t sdmmc_host_set_input_delayline(int slot, sdmmc_delay_line_t delay_line
7068
SLOT_CHECK(slot);
7169
sd_host_slot_handle_t hdl = sdmmc_get_slot_handle(slot);
7270
sd_host_slot_cfg_t cfg = {
73-
.delay_line.delayline = delay_line,
74-
.delay_line.override = true,
71+
.delayline = delay_line,
7572
};
7673
ESP_RETURN_ON_ERROR(sd_host_slot_configure(hdl, &cfg), TAG, "failed to configure slot delay line");
7774

@@ -181,7 +178,7 @@ esp_err_t sdmmc_host_set_bus_width(int slot, size_t width)
181178

182179
sd_host_slot_handle_t hdl = sdmmc_get_slot_handle(slot);
183180
sd_host_slot_cfg_t cfg = {
184-
.width.override = true,
181+
.width = width,
185182
};
186183
ESP_RETURN_ON_ERROR(sd_host_slot_configure(hdl, &cfg), TAG, "failed to configure slot bus width");
187184

@@ -204,8 +201,7 @@ esp_err_t sdmmc_host_set_bus_ddr_mode(int slot, bool ddr_enabled)
204201
{
205202
sd_host_slot_handle_t hdl = sdmmc_get_slot_handle(slot);
206203
sd_host_slot_cfg_t cfg = {
207-
.sampling_mode.mode = ddr_enabled ? SD_SAMPLING_MODE_DDR : SD_SAMPLING_MODE_SDR,
208-
.sampling_mode.override = true,
204+
.sampling_mode = ddr_enabled ? SD_SAMPLING_MODE_DDR : SD_SAMPLING_MODE_SDR,
209205
};
210206
ESP_RETURN_ON_ERROR(sd_host_slot_configure(hdl, &cfg), TAG, "failed to configure slot ddr mode");
211207

‎components/esp_driver_sdmmc/src/sd_host_sdmmc.c‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -201,20 +201,20 @@ static esp_err_t sd_host_slot_sdmmc_configure(sd_host_slot_handle_t slot, const
201201
{
202202
ESP_RETURN_ON_FALSE(slot && config, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
203203
#if SDMMC_LL_DELAY_PHASE_SUPPORTED
204-
ESP_RETURN_ON_FALSE(config->delay_phase.delayphase < SOC_SDMMC_DELAY_PHASE_NUM, ESP_ERR_INVALID_ARG, TAG, "invalid delay phase");
204+
ESP_RETURN_ON_FALSE(config->delayphase < (SOC_SDMMC_DELAY_PHASE_NUM + 1), ESP_ERR_INVALID_ARG, TAG, "invalid delay phase");
205205
#else
206206
//DIG-217
207207
ESP_LOGW(TAG, "esp32 doesn't support input phase delay, fallback to 0 delay");
208208
#endif
209209

210210
#if SOC_SDMMC_UHS_I_SUPPORTED
211-
ESP_RETURN_ON_FALSE(config->delay_line.delayline < SOC_SDMMC_DELAY_PHASE_NUM, ESP_ERR_INVALID_ARG, TAG, "invalid delay line");
211+
ESP_RETURN_ON_FALSE(config->delayline < (SOC_SDMMC_DELAY_PHASE_NUM + 1), ESP_ERR_INVALID_ARG, TAG, "invalid delay line");
212212
#else
213213
ESP_LOGW(TAG, "input line delay not supported, fallback to 0 delay");
214214
#endif
215215

216216
#if CONFIG_IDF_TARGET_ESP32P4
217-
if (config->freq.freq_hz == SDMMC_FREQ_SDR104 * 1000) {
217+
if (config->freq_hz == SDMMC_FREQ_SDR104 * 1000) {
218218
unsigned chip_version = efuse_hal_chip_revision();
219219
ESP_LOGD(TAG, "chip_version: %d", chip_version);
220220
if (!ESP_CHIP_REV_ABOVE(chip_version, 200)) {
@@ -225,28 +225,28 @@ static esp_err_t sd_host_slot_sdmmc_configure(sd_host_slot_handle_t slot, const
225225

226226
sd_host_sdmmc_slot_t *slot_ctx = __containerof(slot, sd_host_sdmmc_slot_t, drv);
227227
portENTER_CRITICAL(&slot_ctx->ctlr->spinlock);
228-
if (config->freq.override) {
229-
slot_ctx->freq.freq_hz = config->freq.freq_hz;
228+
if (config->freq_hz != 0) {
229+
slot_ctx->freq.freq_hz = config->freq_hz;
230230
slot_ctx->freq.freq_state = SD_HOST_SLOT_STATE_READY;
231231
}
232-
if (config->width.override) {
232+
if (config->width != 0) {
233233
slot_ctx->width.width_state = SD_HOST_SLOT_STATE_READY;
234234
}
235-
if (config->sampling_mode.override) {
236-
slot_ctx->sampling_mode.mode = config->sampling_mode.mode;
235+
if (config->sampling_mode != 0) {
236+
slot_ctx->sampling_mode.mode = config->sampling_mode;
237237
slot_ctx->sampling_mode.sampling_mode_state = SD_HOST_SLOT_STATE_READY;
238238
}
239-
if (config->delay_phase.override) {
239+
if (config->delayphase != 0) {
240240
#if SDMMC_LL_DELAY_PHASE_SUPPORTED
241-
slot_ctx->delay_phase.delayphase = config->delay_phase.delayphase;
241+
slot_ctx->delay_phase.delayphase = config->delayphase;
242242
#else
243243
slot_ctx->delay_phase.delayphase = SDMMC_DELAY_PHASE_0;
244244
#endif
245245
slot_ctx->delay_phase.delay_phase_state = SD_HOST_SLOT_STATE_READY;
246246
}
247-
if (config->delay_line.override) {
247+
if (config->delayline != 0) {
248248
#if SOC_SDMMC_UHS_I_SUPPORTED
249-
slot_ctx->delay_line.delayline = config->delay_line.delayline;
249+
slot_ctx->delay_line.delayline = config->delayline;
250250
#else
251251
slot_ctx->delay_line.delayline = SDMMC_DELAY_LINE_0;
252252
#endif

‎components/hal/include/hal/sd_types.h‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,8 @@ typedef enum {
3333
* @brief SD sampling mode
3434
*/
3535
typedef enum {
36-
SD_SAMPLING_MODE_SDR, ///< Single data rate mode
37-
SD_SAMPLING_MODE_DDR, ///< Double data rate mode
36+
SD_SAMPLING_MODE_SDR = 1, ///< Single data rate mode
37+
SD_SAMPLING_MODE_DDR, ///< Double data rate mode
3838
} sd_sampling_mode_t;
3939

4040
/**
@@ -49,7 +49,7 @@ typedef enum {
4949
* Driver will print out how long the delay is, in picosecond (ps).
5050
*/
5151
typedef enum {
52-
SDMMC_DELAY_PHASE_0, /*!< Delay phase 0 */
52+
SDMMC_DELAY_PHASE_0 = 1, /*!< Delay phase 0 */
5353
SDMMC_DELAY_PHASE_1, /*!< Delay phase 1 */
5454
SDMMC_DELAY_PHASE_2, /*!< Delay phase 2 */
5555
SDMMC_DELAY_PHASE_3, /*!< Delay phase 3 */
@@ -64,15 +64,15 @@ typedef enum {
6464
* @brief SD/MMC Host clock timing delay lines
6565
*/
6666
typedef enum {
67-
SDMMC_DELAY_LINE_0, /*!< Delay line 0 */
68-
SDMMC_DELAY_LINE_1, /*!< Delay line 1 */
69-
SDMMC_DELAY_LINE_2, /*!< Delay line 2 */
70-
SDMMC_DELAY_LINE_3, /*!< Delay line 3 */
71-
SDMMC_DELAY_LINE_4, /*!< Delay line 4 */
72-
SDMMC_DELAY_LINE_5, /*!< Delay line 5 */
73-
SDMMC_DELAY_LINE_6, /*!< Delay line 6 */
74-
SDMMC_DELAY_LINE_7, /*!< Delay line 7 */
75-
SDMMC_DELAY_LINE_AUTO, /*!< Auto detect line */
67+
SDMMC_DELAY_LINE_0 = 1, /*!< Delay line 0 */
68+
SDMMC_DELAY_LINE_1, /*!< Delay line 1 */
69+
SDMMC_DELAY_LINE_2, /*!< Delay line 2 */
70+
SDMMC_DELAY_LINE_3, /*!< Delay line 3 */
71+
SDMMC_DELAY_LINE_4, /*!< Delay line 4 */
72+
SDMMC_DELAY_LINE_5, /*!< Delay line 5 */
73+
SDMMC_DELAY_LINE_6, /*!< Delay line 6 */
74+
SDMMC_DELAY_LINE_7, /*!< Delay line 7 */
75+
SDMMC_DELAY_LINE_AUTO, /*!< Auto detect line */
7676
} sdmmc_delay_line_t;
7777

7878
#if SOC_SDMMC_DATA_WIDTH_MAX

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