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1 | 1 | /* |
2 | | - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD |
| 2 | + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD |
3 | 3 | * |
4 | 4 | * SPDX-License-Identifier: Apache-2.0 |
5 | 5 | */ |
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196 | 196 | #define PWM1_SYNC2_PAD_IN_IDX 100 |
197 | 197 | #define PWM1_CH2_B_PAD_OUT_IDX 100 |
198 | 198 | #define PWM1_F0_PAD_IN_IDX 101 |
199 | | -#define ADP_CHRG_PAD_OUT_IDX 101 |
200 | 199 | #define PWM1_F1_PAD_IN_IDX 102 |
201 | | -#define ADP_DISCHRG_PAD_OUT_IDX 102 |
202 | 200 | #define PWM1_F2_PAD_IN_IDX 103 |
203 | | -#define ADP_PRB_EN_PAD_OUT_IDX 103 |
204 | 201 | #define PWM1_CAP0_PAD_IN_IDX 104 |
205 | | -#define ADP_SNS_EN_PAD_OUT_IDX 104 |
206 | 202 | #define PWM1_CAP1_PAD_IN_IDX 105 |
207 | 203 | #define TWAI0_STANDBY_PAD_OUT_IDX 105 |
208 | 204 | #define PWM1_CAP2_PAD_IN_IDX 106 |
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224 | 220 | #define USB_SRP_SESSEND_PAD_IN_IDX 114 |
225 | 221 | #define USB_OTG11_DRVVBUS_PAD_OUT_IDX 114 |
226 | 222 | #define USB_SRP_CHRGVBUS_PAD_OUT_IDX 115 |
227 | | -#define OTG_DRVVBUS_PAD_OUT_IDX 116 |
228 | 223 | #define ULPI_CLK_PAD_IN_IDX 117 |
229 | 224 | #define RNG_CHAIN_CLK_PAD_OUT_IDX 117 |
230 | 225 | #define USB_HSPHY_REFCLK_IN_IDX 118 |
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260 | 255 | #define I3C_SLV_SCL_PAD_OUT_IDX 136 |
261 | 256 | #define I3C_SLV_SDA_PAD_IN_IDX 137 |
262 | 257 | #define I3C_SLV_SDA_PAD_OUT_IDX 137 |
263 | | -#define ADP_PRB_PAD_IN_IDX 138 |
264 | 258 | #define I3C_MST_SCL_PULLUP_EN_PAD_OUT_IDX 138 |
265 | | -#define ADP_SNS_PAD_IN_IDX 139 |
266 | 259 | #define I3C_MST_SDA_PULLUP_EN_PAD_OUT_IDX 139 |
267 | 260 | #define USB_JTAG_TDO_BRIDGE_PAD_IN_IDX 140 |
268 | 261 | #define USB_JTAG_TDI_BRIDGE_PAD_OUT_IDX 140 |
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458 | 451 | #define CORE_GPIO_IN_PAD_IN27_IDX 241 |
459 | 452 | #define CORE_GPIO_OUT_PAD_OUT27_IDX 241 |
460 | 453 | #define CORE_GPIO_IN_PAD_IN28_IDX 242 |
461 | | -#define CORE_GPIO_OUT_PAD_OUT28_IDX 242 |
| 454 | +#define PARLIO_TX_CS_PAD_OUT_IDX 242 |
462 | 455 | #define CORE_GPIO_IN_PAD_IN29_IDX 243 |
463 | | -#define CORE_GPIO_OUT_PAD_OUT29_IDX 243 |
| 456 | +#define EMAC_PTP_PPS_PAD_OUT_IDX 243 |
464 | 457 | #define CORE_GPIO_IN_PAD_IN30_IDX 244 |
465 | | -#define CORE_GPIO_OUT_PAD_OUT30_IDX 244 |
| 458 | +#define ANA_COMP0_OUT_IDX 244 |
466 | 459 | #define CORE_GPIO_IN_PAD_IN31_IDX 245 |
467 | | -#define CORE_GPIO_OUT_PAD_OUT31_IDX 245 |
| 460 | +#define ANA_COMP1_OUT_IDX 245 |
468 | 461 | #define RMT_SIG_PAD_IN0_IDX 246 |
469 | 462 | #define RMT_SIG_PAD_OUT0_IDX 246 |
470 | 463 | #define RMT_SIG_PAD_IN1_IDX 247 |
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485 | 478 | #define SIG_IN_FUNC254_IDX 254 |
486 | 479 | #define SIG_IN_FUNC255_IDX 255 |
487 | 480 | #define SIG_IN_FUNC255_IDX 255 |
| 481 | +// version date 230403 |
488 | 482 | #define SIG_GPIO_OUT_IDX 256 |
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