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Merge branch 'fix/i2c_master_multi_read' into 'master'
fix(i2c_master): Fix that master multi-read failed Closes IDFGH-15601 See merge request espressif/esp-idf!40336
2 parents dea8433 + 7d8d1fb commit 92df25e

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3 files changed

+167
-15
lines changed

3 files changed

+167
-15
lines changed

components/esp_driver_i2c/i2c_master.c

Lines changed: 67 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
#include <string.h>
88
#include <sys/param.h>
99
#include <sys/lock.h>
10+
#include "esp_rom_sys.h"
1011
#include "sdkconfig.h"
1112
#include "esp_types.h"
1213
#include "esp_attr.h"
@@ -291,14 +292,62 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
291292

292293
i2c_master->contains_read = true;
293294
#if !SOC_I2C_STOP_INDEPENDENT
295+
/*
296+
* If the remaining bytes is less than the hardware fifo length - 1,
297+
* it means the read command can be sent out in one time.
298+
* So, we set the status to I2C_STATUS_READ_ALL.
299+
*/
294300
if (remaining_bytes < I2C_FIFO_LEN(i2c_master->base->port_num) - 1) {
301+
atomic_store(&i2c_master->status, I2C_STATUS_READ_ALL);
295302
if (i2c_operation->hw_cmd.ack_val == I2C_ACK_VAL) {
296303
if (remaining_bytes != 0) {
297-
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
298-
i2c_master->read_len_static = i2c_master->rx_cnt;
299-
i2c_master->cmd_idx++;
304+
// If the next transaction is a read command, and the ack value is I2C_ACK_VAL,
305+
// that means we have multi read jobs. We send out this read command first.
306+
// Otherwise, we can mix with other commands, like stop.
307+
i2c_operation_t next_transaction = i2c_master->i2c_trans.ops[i2c_master->trans_idx + 1];
308+
if (next_transaction.hw_cmd.op_code == I2C_LL_CMD_READ && next_transaction.hw_cmd.ack_val == I2C_ACK_VAL) {
309+
portENTER_CRITICAL_SAFE(&handle->spinlock);
310+
i2c_master->read_len_static = i2c_master->rx_cnt;
311+
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
312+
i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
313+
i2c_master->cmd_idx = 0;
314+
i2c_master->read_buf_pos = i2c_master->trans_idx;
315+
i2c_master->trans_idx++;
316+
i2c_master->i2c_trans.cmd_count--;
317+
portEXIT_CRITICAL_SAFE(&handle->spinlock);
318+
if (i2c_master->async_trans == false) {
319+
i2c_hal_master_trans_start(hal);
320+
} else {
321+
i2c_master->async_break = true;
322+
}
323+
} else {
324+
portENTER_CRITICAL_SAFE(&handle->spinlock);
325+
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
326+
i2c_master->read_len_static = i2c_master->rx_cnt;
327+
i2c_master->cmd_idx++;
328+
i2c_master->read_buf_pos = i2c_master->trans_idx;
329+
i2c_master->trans_idx++;
330+
i2c_master->i2c_trans.cmd_count--;
331+
portEXIT_CRITICAL_SAFE(&handle->spinlock);
332+
if (i2c_master->async_trans == false) {
333+
if (xPortInIsrContext()) {
334+
xSemaphoreGiveFromISR(i2c_master->cmd_semphr, do_yield);
335+
} else {
336+
xSemaphoreGive(i2c_master->cmd_semphr);
337+
}
338+
}
339+
}
340+
} else {
341+
i2c_master->trans_idx++;
342+
i2c_master->i2c_trans.cmd_count--;
343+
if (i2c_master->async_trans == false) {
344+
if (xPortInIsrContext()) {
345+
xSemaphoreGiveFromISR(i2c_master->cmd_semphr, do_yield);
346+
} else {
347+
xSemaphoreGive(i2c_master->cmd_semphr);
348+
}
349+
}
300350
}
301-
i2c_master->read_buf_pos = i2c_master->trans_idx;
302351
} else {
303352
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
304353
// If the read position has not been marked, that means the transaction doesn't contain read-ack
@@ -309,19 +358,20 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
309358
i2c_master->read_len_static = i2c_master->rx_cnt;
310359
}
311360
i2c_master->cmd_idx++;
312-
}
313-
i2c_master->trans_idx++;
314-
i2c_master->i2c_trans.cmd_count--;
315-
if (i2c_master->async_trans == false) {
316-
if (xPortInIsrContext()) {
317-
xSemaphoreGiveFromISR(i2c_master->cmd_semphr, do_yield);
318-
} else {
319-
xSemaphoreGive(i2c_master->cmd_semphr);
361+
i2c_master->trans_idx++;
362+
i2c_master->i2c_trans.cmd_count--;
363+
if (i2c_master->async_trans == false) {
364+
if (xPortInIsrContext()) {
365+
xSemaphoreGiveFromISR(i2c_master->cmd_semphr, do_yield);
366+
} else {
367+
xSemaphoreGive(i2c_master->cmd_semphr);
368+
}
320369
}
321370
}
322371
} else {
323372
atomic_store(&i2c_master->status, I2C_STATUS_READ);
324373
portENTER_CRITICAL_SAFE(&handle->spinlock);
374+
i2c_master->read_buf_pos = i2c_master->trans_idx;
325375
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
326376
i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
327377
if (i2c_master->async_trans == false) {
@@ -342,6 +392,7 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
342392
i2c_master->i2c_trans.cmd_count--;
343393
}
344394
}
395+
i2c_master->read_buf_pos = i2c_master->trans_idx;
345396
i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
346397
i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
347398
portEXIT_CRITICAL_SAFE(&handle->spinlock);
@@ -672,7 +723,7 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
672723
i2c_hal_context_t *hal = &i2c_master->base->hal;
673724

674725
if (atomic_load(&i2c_master->status) == I2C_STATUS_READ) {
675-
i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->trans_idx];
726+
i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->read_buf_pos];
676727
portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
677728
i2c_ll_read_rxfifo(hal->dev, i2c_operation->data + i2c_operation->bytes_used, i2c_master->rx_cnt);
678729
/* rx_cnt bytes have just been read, increment the number of bytes used from the buffer */
@@ -686,6 +737,7 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
686737
i2c_master->read_buf_pos = i2c_master->trans_idx;
687738
i2c_master->trans_idx++;
688739
i2c_operation->bytes_used = 0;
740+
i2c_master->read_len_static = 0;
689741
}
690742
portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);
691743
}
@@ -695,10 +747,11 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
695747
portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
696748
i2c_ll_read_rxfifo(hal->dev, i2c_operation->data + i2c_operation->bytes_used, i2c_master->read_len_static);
697749
// If the read command only contain nack marker, no read it for the second time.
698-
if (i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data) {
750+
if (i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data && i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].hw_cmd.ack_val == I2C_NACK_VAL) {
699751
i2c_ll_read_rxfifo(hal->dev, i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data, 1);
700752
}
701753
i2c_master->w_r_size = i2c_master->read_len_static + 1;
754+
i2c_master->read_len_static = 0;
702755
i2c_master->contains_read = false;
703756
portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);
704757
}

components/esp_driver_i2c/include/driver/i2c_types.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,8 @@ typedef int i2c_port_num_t;
2525
* @brief Enumeration for I2C fsm status.
2626
*/
2727
typedef enum {
28-
I2C_STATUS_READ, /*!< read status for current master command */
28+
I2C_STATUS_READ, /*!< read status for current master command, but just partial read, not all data is read is this status */
29+
I2C_STATUS_READ_ALL, /*!< read status for current master command, all data is read is this status */
2930
I2C_STATUS_WRITE, /*!< write status for current master command */
3031
I2C_STATUS_START, /*!< Start status for current master command */
3132
I2C_STATUS_STOP, /*!< stop status for current master command */

components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_i2c_multi.c

Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -387,6 +387,104 @@ static void slave_write_buffer_test_single_byte(void)
387387

388388
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test single byte", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test_single_byte, slave_write_buffer_test_single_byte);
389389

390+
static void master_read_slave_test_with_multi_read_job(void)
391+
{
392+
uint8_t data_rd[DATA_LENGTH] = {0};
393+
i2c_master_bus_config_t i2c_mst_config = {
394+
.clk_source = I2C_CLK_SRC_DEFAULT,
395+
.i2c_port = TEST_I2C_PORT,
396+
.scl_io_num = I2C_MASTER_SCL_IO,
397+
.sda_io_num = I2C_MASTER_SDA_IO,
398+
.flags.enable_internal_pullup = true,
399+
};
400+
i2c_master_bus_handle_t bus_handle;
401+
TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config, &bus_handle));
402+
403+
i2c_device_config_t dev_cfg = {
404+
.dev_addr_length = I2C_ADDR_BIT_LEN_7,
405+
.device_address = I2C_DEVICE_ADDRESS_NOT_USED,
406+
.scl_speed_hz = 100000,
407+
.scl_wait_us = 20000,
408+
};
409+
410+
i2c_master_dev_handle_t dev_handle;
411+
TEST_ESP_OK(i2c_master_bus_add_device(bus_handle, &dev_cfg, &dev_handle));
412+
413+
unity_wait_for_signal("i2c slave init finish");
414+
415+
uint8_t read_address = (ESP_SLAVE_ADDR << 1 | 1);
416+
417+
i2c_operation_job_t i2c_ops[] = {
418+
{ .command = I2C_MASTER_CMD_START },
419+
{ .command = I2C_MASTER_CMD_WRITE, .write = { .ack_check = true, .data = (uint8_t *) &read_address, .total_bytes = 1 } },
420+
{ .command = I2C_MASTER_CMD_READ, .read = { .ack_value = I2C_ACK_VAL, .data = data_rd, .total_bytes = 1 }},
421+
{ .command = I2C_MASTER_CMD_READ, .read = { .ack_value = I2C_ACK_VAL, .data = data_rd + 1, .total_bytes = 1 }},
422+
{ .command = I2C_MASTER_CMD_READ, .read = { .ack_value = I2C_NACK_VAL, .data = data_rd + 2, .total_bytes = 1 }},
423+
{ .command = I2C_MASTER_CMD_STOP },
424+
};
425+
426+
i2c_master_execute_defined_operations(dev_handle, i2c_ops, sizeof(i2c_ops) / sizeof(i2c_operation_job_t), 1000);
427+
vTaskDelay(100 / portTICK_PERIOD_MS);
428+
TEST_ASSERT(data_rd[0] == 6);
429+
TEST_ASSERT(data_rd[1] == 8);
430+
TEST_ASSERT(data_rd[2] == 10);
431+
unity_send_signal("ready to delete master read test");
432+
433+
TEST_ESP_OK(i2c_master_bus_rm_device(dev_handle));
434+
TEST_ESP_OK(i2c_del_master_bus(bus_handle));
435+
}
436+
437+
static void slave_write_buffer_test_single_byte_for_multi_read_job(void)
438+
{
439+
i2c_slave_dev_handle_t handle;
440+
uint8_t data_wr[DATA_LENGTH];
441+
event_queue = xQueueCreate(2, sizeof(i2c_slave_event_t));
442+
assert(event_queue);
443+
444+
i2c_slave_config_t i2c_slv_config = {
445+
.i2c_port = TEST_I2C_PORT,
446+
.clk_source = I2C_CLK_SRC_DEFAULT,
447+
.scl_io_num = I2C_SLAVE_SCL_IO,
448+
.sda_io_num = I2C_SLAVE_SDA_IO,
449+
.slave_addr = ESP_SLAVE_ADDR,
450+
.send_buf_depth = DATA_LENGTH,
451+
.receive_buf_depth = DATA_LENGTH,
452+
.flags.enable_internal_pullup = true,
453+
};
454+
455+
TEST_ESP_OK(i2c_new_slave_device(&i2c_slv_config, &handle));
456+
457+
i2c_slave_event_callbacks_t cbs = {
458+
.on_receive = i2c_slave_receive_cb,
459+
.on_request = i2c_slave_request_cb,
460+
};
461+
462+
TEST_ESP_OK(i2c_slave_register_event_callbacks(handle, &cbs, NULL));
463+
464+
unity_send_signal("i2c slave init finish");
465+
466+
data_wr[0] = 6;
467+
data_wr[1] = 8;
468+
data_wr[2] = 10;
469+
470+
i2c_slave_event_t evt;
471+
uint32_t write_len;
472+
while (true) {
473+
if (xQueueReceive(event_queue, &evt, portMAX_DELAY) == pdTRUE) {
474+
if (evt == I2C_SLAVE_EVT_TX) {
475+
TEST_ESP_OK(i2c_slave_write(handle, data_wr, 3, &write_len, 1000));
476+
break;
477+
}
478+
}
479+
}
480+
481+
unity_wait_for_signal("ready to delete master read test");
482+
vQueueDelete(event_queue);
483+
TEST_ESP_OK(i2c_del_slave_device(handle));
484+
}
485+
486+
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test single byte 2", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test_with_multi_read_job, slave_write_buffer_test_single_byte_for_multi_read_job);
487+
390488
static void i2c_slave_repeat_read(void)
391489
{
392490
unity_wait_for_signal("i2c master init first");

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