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fix(esp_hw_support): fix mmu memory powered down issue by software backup and restore mmu table content
squash! fix(esp_hw_support): fix mmu memory powered down issue by software backup and restore mmu table content
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‎components/esp_hw_support/lowpower/port/esp32c61/sleep_mmu.c‎

Lines changed: 162 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,162 @@
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/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <string.h>
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#include <inttypes.h>
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_sleep.h"
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#include "esp_log.h"
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#include "esp_heap_caps.h"
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#include "soc/soc_caps.h"
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#include "sdkconfig.h"
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#include "soc/spi_mem_reg.h"
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#include "esp_private/startup_internal.h"
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static const char *TAG = "sleep_mmu";
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typedef struct {
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uint32_t start;
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uint32_t end;
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} mmu_domain_dev_regs_region_t;
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typedef struct {
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mmu_domain_dev_regs_region_t *region;
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int region_num;
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uint32_t *regs_frame;
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} mmu_domain_dev_sleep_frame_t;
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/**
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* Internal structure which holds all requested light sleep mmu retention parameters
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*/
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typedef struct {
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struct {
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mmu_domain_dev_sleep_frame_t *mmu_table_frame;
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} retent;
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} sleep_mmu_retention_t;
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static DRAM_ATTR __attribute__((unused)) sleep_mmu_retention_t s_mmu_retention;
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static void * mmu_domain_dev_sleep_frame_alloc_and_init(const mmu_domain_dev_regs_region_t *regions, const int region_num)
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{
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const int region_sz = sizeof(mmu_domain_dev_regs_region_t) * region_num;
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int regs_frame_sz = 0;
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for (int num = 0; num < region_num; num++) {
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regs_frame_sz += regions[num].end - regions[num].start;
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}
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void *frame = heap_caps_malloc(sizeof(mmu_domain_dev_sleep_frame_t) + region_sz + regs_frame_sz, MALLOC_CAP_32BIT|MALLOC_CAP_INTERNAL);
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if (frame) {
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mmu_domain_dev_regs_region_t *region = (mmu_domain_dev_regs_region_t *)(frame + sizeof(mmu_domain_dev_sleep_frame_t));
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memcpy(region, regions, region_num * sizeof(mmu_domain_dev_regs_region_t));
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void *regs_frame = frame + sizeof(mmu_domain_dev_sleep_frame_t) + region_sz;
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memset(regs_frame, 0, regs_frame_sz);
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*(mmu_domain_dev_sleep_frame_t *)frame = (mmu_domain_dev_sleep_frame_t) {
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.region = region,
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.region_num = region_num,
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.regs_frame = (uint32_t *)regs_frame
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};
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}
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return frame;
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}
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static inline void * mmu_domain_mmu_table_sleep_frame_alloc_and_init(void)
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{
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#define MMU_TABLE_SIZE (512 * 4)
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const static mmu_domain_dev_regs_region_t regions[] = {
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{ .start = SPI_MEM_MMU_ITEM_CONTENT_REG(0), .end = SPI_MEM_MMU_ITEM_CONTENT_REG(0) + MMU_TABLE_SIZE}
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};
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return mmu_domain_dev_sleep_frame_alloc_and_init(regions, sizeof(regions) / sizeof(regions[0]));
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}
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static IRAM_ATTR void mmu_domain_dev_regs_save(mmu_domain_dev_sleep_frame_t *frame)
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{
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assert(frame);
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mmu_domain_dev_regs_region_t *region = frame->region;
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uint32_t *regs_frame = frame->regs_frame;
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int offset = 0;
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for (int i = 0; i < frame->region_num; i++) {
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for (uint32_t addr = region[i].start; addr < region[i].end; addr+=4) {
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REG_WRITE(SPI_MEM_MMU_ITEM_INDEX_REG(0), offset);
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regs_frame[offset++] = REG_READ(SPI_MEM_MMU_ITEM_CONTENT_REG(0));
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}
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}
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}
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static IRAM_ATTR void mmu_domain_dev_regs_restore(mmu_domain_dev_sleep_frame_t *frame)
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{
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assert(frame);
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mmu_domain_dev_regs_region_t *region = frame->region;
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uint32_t *regs_frame = frame->regs_frame;
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int offset = 0;
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for (int i = 0; i < frame->region_num; i++) {
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for (uint32_t addr = region[i].start; addr < region[i].end; addr+=4) {
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REG_WRITE(SPI_MEM_MMU_ITEM_INDEX_REG(0), offset);
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REG_WRITE(SPI_MEM_MMU_ITEM_CONTENT_REG(0),regs_frame[offset++]);
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}
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}
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}
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IRAM_ATTR void esp_sleep_mmu_retention(bool backup_or_restore)
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{
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if (backup_or_restore) {
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mmu_domain_dev_regs_save(s_mmu_retention.retent.mmu_table_frame);
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} else {
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mmu_domain_dev_regs_restore(s_mmu_retention.retent.mmu_table_frame);
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}
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}
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static esp_err_t esp_sleep_mmu_retention_deinit_impl(void)
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{
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if (s_mmu_retention.retent.mmu_table_frame) {
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heap_caps_free((void *)s_mmu_retention.retent.mmu_table_frame);
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s_mmu_retention.retent.mmu_table_frame = NULL;
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}
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return ESP_OK;
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}
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static esp_err_t esp_sleep_mmu_retention_init_impl(void)
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{
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if (s_mmu_retention.retent.mmu_table_frame == NULL) {
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void *frame = mmu_domain_mmu_table_sleep_frame_alloc_and_init();
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if (frame == NULL) {
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goto err;
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}
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s_mmu_retention.retent.mmu_table_frame = (mmu_domain_dev_sleep_frame_t *)frame;
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}
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return ESP_OK;
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err:
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esp_sleep_mmu_retention_deinit();
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return ESP_ERR_NO_MEM;
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}
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esp_err_t esp_sleep_mmu_retention_init(void)
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{
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return esp_sleep_mmu_retention_init_impl();
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}
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esp_err_t esp_sleep_mmu_retention_deinit(void)
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{
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return esp_sleep_mmu_retention_deinit_impl();
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}
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bool mmu_domain_pd_allowed(void)
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{
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return (s_mmu_retention.retent.mmu_table_frame != NULL);
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}
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ESP_SYSTEM_INIT_FN(sleep_mmu_startup_init, SECONDARY, BIT(0), 108)
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{
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esp_err_t ret;
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ret = esp_sleep_mmu_retention_init();
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if (ret != ESP_OK) {
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ESP_EARLY_LOGW(TAG, "Failed to enable TOP power down during light sleep.");
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}
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return ESP_OK;
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}

‎components/esp_hw_support/sleep_modes.c‎

Lines changed: 3 additions & 0 deletions
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@@ -189,6 +189,9 @@
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#endif
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#if SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD
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#if CONFIG_IDF_TARGET_ESP32C61
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#define SLEEP_MMU_TABLE_RETENTION_OVERHEAD_US (1232)
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#elif CONFIG_IDF_TARGET_ESP32C5
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#define SLEEP_MMU_TABLE_RETENTION_OVERHEAD_US (1220)
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#endif
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#endif

‎components/esp_system/system_init_fn.txt‎

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@@ -87,6 +87,7 @@ SECONDARY: 106: sleep_clock_startup_init in components/esp_hw_support/lowpower/p
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SECONDARY: 106: sleep_clock_startup_init in components/esp_hw_support/lowpower/port/esp32p4/sleep_clock.c on BIT(0)
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SECONDARY: 107: sleep_sys_periph_startup_init in components/esp_hw_support/sleep_system_peripheral.c on BIT(0)
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SECONDARY: 108: sleep_mmu_startup_init in components/esp_hw_support/lowpower/port/esp32c5/sleep_mmu.c on BIT(0)
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SECONDARY: 108: sleep_mmu_startup_init in components/esp_hw_support/lowpower/port/esp32c61/sleep_mmu.c on BIT(0)
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# app_trace has to be initialized before systemview
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SECONDARY: 115: esp_apptrace_init in components/app_trace/app_trace.c on ESP_SYSTEM_INIT_ALL_CORES

‎components/soc/esp32c61/include/soc/Kconfig.soc_caps.in‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -849,12 +849,16 @@ config SOC_PM_CPU_RETENTION_BY_SW
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config SOC_PM_MODEM_RETENTION_BY_REGDMA
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bool
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default n
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default y
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854854
config SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN
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bool
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default y
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config SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD
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bool
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default y
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config SOC_PM_PAU_LINK_NUM
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int
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default 4

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