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refactor(lpperi): compatible refactor for H2 ECO5
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11 files changed

+537
-50
lines changed

11 files changed

+537
-50
lines changed

components/bootloader_support/src/esp32h2/bootloader_esp32h2.c

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Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
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#include "hal/lpwdt_ll.h"
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#include "soc/lp_wdt_reg.h"
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#include "soc/pmu_reg.h"
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#include "soc/lpperi_struct.h"
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#include "hal/efuse_hal.h"
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#include "hal/regi2c_ctrl_ll.h"
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#include "hal/brownout_ll.h"
@@ -109,6 +110,9 @@ esp_err_t bootloader_init(void)
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{
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esp_err_t ret = ESP_OK;
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113+
// Assign the compatible LPPERI register address in case it is used in the bootloader
114+
lpperi_compatible_reg_addr_init();
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bootloader_hardware_init();
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bootloader_ana_reset_config();
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bootloader_super_wdt_auto_feed();

components/esp_system/port/cpu_start.c

Lines changed: 9 additions & 1 deletion
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@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
@@ -53,6 +53,7 @@
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#elif CONFIG_IDF_TARGET_ESP32H2
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#include "esp32h2/rom/cache.h"
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#include "esp_memprot.h"
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#include "soc/lpperi_struct.h"
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#elif CONFIG_IDF_TARGET_ESP32C2
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#include "esp32c2/rom/cache.h"
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#include "esp32c2/rom/secure_boot.h"
@@ -451,6 +452,13 @@ void IRAM_ATTR call_start_cpu0(void)
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}
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#endif
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455+
#if CONFIG_IDF_TARGET_ESP32H2
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// Some modules' register layout are not binary compatible among the different chip revisions,
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// they will be wrapped into a new compatible instance which will point to the correct register address according to the revision.
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// To ensure the compatible instance is initialized before used, the initialization is done after BBS is cleared
459+
lpperi_compatible_reg_addr_init();
460+
#endif
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454462
#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP && !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE && !SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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// It helps to fix missed cache settings for other cores. It happens when bootloader is unicore.
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do_multicore_settings();

components/hal/esp32h2/include/hal/lp_clkrst_ll.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
@@ -63,7 +63,7 @@ static inline void lp_clkrst_ll_select_modem_32k_clock_source(lp_clkrst_dev_t *h
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__attribute__((always_inline))
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static inline void _lp_clkrst_ll_enable_rng_clock(bool en)
6565
{
66-
LPPERI.clk_en.rng_ck_en = en;
66+
LPPERI.clk_en->rng_ck_en = en;
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}
6868

6969
/// LPPERI.clk_en is a shared register, so this function must be used in an atomic way

components/hal/esp32h2/include/hal/rtc_io_ll.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
@@ -38,8 +38,8 @@ typedef enum {
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*/
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static inline void _rtcio_ll_enable_io_clock(bool enable)
4040
{
41-
LPPERI.clk_en.lp_io_ck_en = enable;
42-
while (LPPERI.clk_en.lp_io_ck_en != enable) {
41+
LPPERI.clk_en->lp_io_ck_en = enable;
42+
while (LPPERI.clk_en->lp_io_ck_en != enable) {
4343
;
4444
}
4545
}

components/soc/CMakeLists.txt

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@@ -27,6 +27,10 @@ if(target STREQUAL "esp32")
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list(APPEND srcs "${target_folder}/dport_access.c")
2828
endif()
2929

30+
if(target STREQUAL "esp32h2")
31+
list(APPEND srcs "${target_folder}/lpperi_struct.c")
32+
endif()
33+
3034
if(CONFIG_SOC_ADC_SUPPORTED)
3135
list(APPEND srcs "${target_folder}/adc_periph.c")
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endif()
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
/**
2+
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/* For compatibility of ECO0 and ECO5 */
8+
9+
#pragma once
10+
11+
#include "soc/lpperi_rev0_0_struct.h"
12+
#include "soc/lpperi_rev1_2_struct.h"
13+
14+
#include <stdint.h>
15+
#ifdef __cplusplus
16+
extern "C" {
17+
#endif
18+
19+
/**
20+
* @brief Compatible lpperi struct for ECO0-ECO4 and ECO5
21+
*
22+
*/
23+
typedef struct {
24+
volatile lpperi_clk_en_reg_t *clk_en;
25+
volatile lpperi_reset_en_reg_t *reset_en;
26+
volatile lpperi_rng_cfg_reg_t *rng_cfg;
27+
volatile lpperi_rng_data_reg_t *rng_data;
28+
volatile lpperi_cpu_reg_t *cpu;
29+
volatile lpperi_bus_timeout_reg_t *bus_timeout;
30+
volatile lpperi_bus_timeout_addr_reg_t *bus_timeout_addr;
31+
volatile lpperi_bus_timeout_uid_reg_t *bus_timeout_uid;
32+
volatile lpperi_mem_ctrl_reg_t *mem_ctrl;
33+
volatile lpperi_interrupt_source_reg_t *interrupt_source;
34+
volatile lpperi_debug_sel0_reg_t *debug_sel0;
35+
volatile lpperi_debug_sel1_reg_t *debug_sel1;
36+
volatile lpperi_date_reg_t *date;
37+
} lpperi_dev_t;
38+
39+
extern lpperi_dev_t LPPERI; // Compatible instance that achieved in 'lpperi_struct.c'
40+
41+
/**
42+
* @brief Initialize the LP_PERI register address according to the register version
43+
*/
44+
void lpperi_compatible_reg_addr_init(void);
45+
46+
#ifdef __cplusplus
47+
}
48+
#endif

components/soc/esp32h2/ld/esp32h2.peripherals.ld

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,8 @@ PROVIDE ( LP_TIMER = 0x600B0C00 );
6666
PROVIDE ( LP_AON = 0x600B1000 );
6767
PROVIDE ( LP_WDT = 0x600B1C00 );
6868
PROVIDE ( I2C_ANA_MST = 0x600B2400 );
69-
PROVIDE ( LPPERI = 0x600B2800 );
69+
PROVIDE ( LPPERI_REV0_0 = 0x600B2800 );
70+
PROVIDE ( LPPERI_REV1_2 = 0x600B2800 );
7071
PROVIDE ( LP_ANA_PERI = 0x600B2C00 );
7172
PROVIDE ( LP_APM = 0x600B3800 );
7273
PROVIDE ( OTP_DEBUG = 0x600B3C00 );
Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
/*
2+
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
#include <stddef.h>
7+
#include "assert.h"
8+
#include "soc/lpperi_struct.h"
9+
10+
#define LPPERI_REV1_2_DATE (0x2308030)
11+
#define LPPERI_REG_ADDR(reg) ((LPPERI_REV1_2.date.lpperi_date >= LPPERI_REV1_2_DATE) ? \
12+
&LPPERI_REV1_2.reg : \
13+
(volatile typeof(LPPERI_REV1_2.reg) *)&LPPERI_REV0_0.reg)
14+
15+
/**
16+
* @brief Compatible LPPERI instance
17+
* @note Set NULL as default so that to abort when use the LPPEIR before initialization
18+
* If you want to use the LPPERI before it is initialized, please use `lpperi_reg.h` instead
19+
*/
20+
lpperi_dev_t LPPERI = {};
21+
22+
/**
23+
* @brief Initialize the LP_PERI register address according to the register version
24+
*/
25+
void lpperi_compatible_reg_addr_init(void)
26+
{
27+
LPPERI.clk_en = LPPERI_REG_ADDR(clk_en);
28+
LPPERI.reset_en = LPPERI_REG_ADDR(reset_en);
29+
LPPERI.rng_cfg = ((LPPERI_REV1_2.date.lpperi_date >= LPPERI_REV1_2_DATE) ? &LPPERI_REV1_2.rng_cfg : NULL);
30+
LPPERI.rng_data = LPPERI_REG_ADDR(rng_data);
31+
LPPERI.cpu = LPPERI_REG_ADDR(cpu);
32+
LPPERI.bus_timeout = LPPERI_REG_ADDR(bus_timeout);
33+
LPPERI.bus_timeout_addr = LPPERI_REG_ADDR(bus_timeout_addr);
34+
LPPERI.bus_timeout_uid = LPPERI_REG_ADDR(bus_timeout_uid);
35+
LPPERI.mem_ctrl = LPPERI_REG_ADDR(mem_ctrl);
36+
LPPERI.interrupt_source = LPPERI_REG_ADDR(interrupt_source);
37+
LPPERI.debug_sel0 = LPPERI_REG_ADDR(debug_sel0);
38+
LPPERI.debug_sel1 = LPPERI_REG_ADDR(debug_sel1);
39+
LPPERI.date = LPPERI_REG_ADDR(date);
40+
}
41+
42+
__attribute__((constructor))
43+
static void s_lpperi_compatible_init_check(void)
44+
{
45+
// Make sure it is initialized
46+
assert(LPPERI.clk_en != NULL);
47+
}

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