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songruosongruo
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fix(ledc): align ledc register typo with TRM
1 parent dd72141 commit afccb78

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10 files changed

+148
-148
lines changed

10 files changed

+148
-148
lines changed

‎components/soc/esp32c5/register/soc/ledc_reg.h‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -1731,38 +1731,38 @@ extern "C" {
17311731
#define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S)
17321732
#define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U
17331733
#define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19
1734-
/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0;
1734+
/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0;
17351735
* Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1:
17361736
* Enable
17371737
*/
1738-
#define LEDC_EVT_TIME0_CMP_EN (BIT(20))
1739-
#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S)
1740-
#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U
1741-
#define LEDC_EVT_TIME0_CMP_EN_S 20
1742-
/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0;
1738+
#define LEDC_EVT_TIMER0_CMP_EN (BIT(20))
1739+
#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S)
1740+
#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U
1741+
#define LEDC_EVT_TIMER0_CMP_EN_S 20
1742+
/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0;
17431743
* Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1:
17441744
* Enable
17451745
*/
1746-
#define LEDC_EVT_TIME1_CMP_EN (BIT(21))
1747-
#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S)
1748-
#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U
1749-
#define LEDC_EVT_TIME1_CMP_EN_S 21
1750-
/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0;
1746+
#define LEDC_EVT_TIMER1_CMP_EN (BIT(21))
1747+
#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S)
1748+
#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U
1749+
#define LEDC_EVT_TIMER1_CMP_EN_S 21
1750+
/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0;
17511751
* Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1:
17521752
* Enable
17531753
*/
1754-
#define LEDC_EVT_TIME2_CMP_EN (BIT(22))
1755-
#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S)
1756-
#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U
1757-
#define LEDC_EVT_TIME2_CMP_EN_S 22
1758-
/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0;
1754+
#define LEDC_EVT_TIMER2_CMP_EN (BIT(22))
1755+
#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S)
1756+
#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U
1757+
#define LEDC_EVT_TIMER2_CMP_EN_S 22
1758+
/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0;
17591759
* Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1:
17601760
* Enable
17611761
*/
1762-
#define LEDC_EVT_TIME3_CMP_EN (BIT(23))
1763-
#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S)
1764-
#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U
1765-
#define LEDC_EVT_TIME3_CMP_EN_S 23
1762+
#define LEDC_EVT_TIMER3_CMP_EN (BIT(23))
1763+
#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S)
1764+
#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U
1765+
#define LEDC_EVT_TIMER3_CMP_EN_S 23
17661766
/** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0;
17671767
* Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0:
17681768
* Disable\\1: Enable

‎components/soc/esp32c5/register/soc/ledc_struct.h‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -249,26 +249,26 @@ typedef union {
249249
* Disable\\1: Enable
250250
*/
251251
uint32_t evt_time_ovf_timer3_en:1;
252-
/** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0;
252+
/** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0;
253253
* Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1:
254254
* Enable
255255
*/
256-
uint32_t evt_time0_cmp_en:1;
257-
/** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0;
256+
uint32_t evt_timer0_cmp_en:1;
257+
/** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0;
258258
* Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1:
259259
* Enable
260260
*/
261-
uint32_t evt_time1_cmp_en:1;
262-
/** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0;
261+
uint32_t evt_timer1_cmp_en:1;
262+
/** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0;
263263
* Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1:
264264
* Enable
265265
*/
266-
uint32_t evt_time2_cmp_en:1;
267-
/** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0;
266+
uint32_t evt_timer2_cmp_en:1;
267+
/** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0;
268268
* Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1:
269269
* Enable
270270
*/
271-
uint32_t evt_time3_cmp_en:1;
271+
uint32_t evt_timer3_cmp_en:1;
272272
/** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0;
273273
* Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0:
274274
* Disable\\1: Enable

‎components/soc/esp32c61/register/soc/ledc_reg.h‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -1731,38 +1731,38 @@ extern "C" {
17311731
#define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S)
17321732
#define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U
17331733
#define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19
1734-
/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0;
1734+
/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0;
17351735
* Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1:
17361736
* Enable
17371737
*/
1738-
#define LEDC_EVT_TIME0_CMP_EN (BIT(20))
1739-
#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S)
1740-
#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U
1741-
#define LEDC_EVT_TIME0_CMP_EN_S 20
1742-
/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0;
1738+
#define LEDC_EVT_TIMER0_CMP_EN (BIT(20))
1739+
#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S)
1740+
#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U
1741+
#define LEDC_EVT_TIMER0_CMP_EN_S 20
1742+
/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0;
17431743
* Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1:
17441744
* Enable
17451745
*/
1746-
#define LEDC_EVT_TIME1_CMP_EN (BIT(21))
1747-
#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S)
1748-
#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U
1749-
#define LEDC_EVT_TIME1_CMP_EN_S 21
1750-
/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0;
1746+
#define LEDC_EVT_TIMER1_CMP_EN (BIT(21))
1747+
#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S)
1748+
#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U
1749+
#define LEDC_EVT_TIMER1_CMP_EN_S 21
1750+
/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0;
17511751
* Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1:
17521752
* Enable
17531753
*/
1754-
#define LEDC_EVT_TIME2_CMP_EN (BIT(22))
1755-
#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S)
1756-
#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U
1757-
#define LEDC_EVT_TIME2_CMP_EN_S 22
1758-
/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0;
1754+
#define LEDC_EVT_TIMER2_CMP_EN (BIT(22))
1755+
#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S)
1756+
#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U
1757+
#define LEDC_EVT_TIMER2_CMP_EN_S 22
1758+
/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0;
17591759
* Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1:
17601760
* Enable
17611761
*/
1762-
#define LEDC_EVT_TIME3_CMP_EN (BIT(23))
1763-
#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S)
1764-
#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U
1765-
#define LEDC_EVT_TIME3_CMP_EN_S 23
1762+
#define LEDC_EVT_TIMER3_CMP_EN (BIT(23))
1763+
#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S)
1764+
#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U
1765+
#define LEDC_EVT_TIMER3_CMP_EN_S 23
17661766
/** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0;
17671767
* Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0:
17681768
* Disable\\1: Enable

‎components/soc/esp32c61/register/soc/ledc_struct.h‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -249,26 +249,26 @@ typedef union {
249249
* Disable\\1: Enable
250250
*/
251251
uint32_t evt_time_ovf_timer3_en:1;
252-
/** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0;
252+
/** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0;
253253
* Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.\\0: Disable\\1:
254254
* Enable
255255
*/
256-
uint32_t evt_time0_cmp_en:1;
257-
/** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0;
256+
uint32_t evt_timer0_cmp_en:1;
257+
/** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0;
258258
* Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.\\0: Disable\\1:
259259
* Enable
260260
*/
261-
uint32_t evt_time1_cmp_en:1;
262-
/** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0;
261+
uint32_t evt_timer1_cmp_en:1;
262+
/** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0;
263263
* Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.\\0: Disable\\1:
264264
* Enable
265265
*/
266-
uint32_t evt_time2_cmp_en:1;
267-
/** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0;
266+
uint32_t evt_timer2_cmp_en:1;
267+
/** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0;
268268
* Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.\\0: Disable\\1:
269269
* Enable
270270
*/
271-
uint32_t evt_time3_cmp_en:1;
271+
uint32_t evt_timer3_cmp_en:1;
272272
/** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0;
273273
* Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.\\0:
274274
* Disable\\1: Enable

‎components/soc/esp32h21/register/soc/ledc_reg.h‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -2135,34 +2135,34 @@ extern "C" {
21352135
#define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S)
21362136
#define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U
21372137
#define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19
2138-
/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0;
2138+
/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0;
21392139
* Ledc timer0 compare event enable register, write 1 to enable this event.
21402140
*/
2141-
#define LEDC_EVT_TIME0_CMP_EN (BIT(20))
2142-
#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S)
2143-
#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U
2144-
#define LEDC_EVT_TIME0_CMP_EN_S 20
2145-
/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0;
2141+
#define LEDC_EVT_TIMER0_CMP_EN (BIT(20))
2142+
#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S)
2143+
#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U
2144+
#define LEDC_EVT_TIMER0_CMP_EN_S 20
2145+
/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0;
21462146
* Ledc timer1 compare event enable register, write 1 to enable this event.
21472147
*/
2148-
#define LEDC_EVT_TIME1_CMP_EN (BIT(21))
2149-
#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S)
2150-
#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U
2151-
#define LEDC_EVT_TIME1_CMP_EN_S 21
2152-
/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0;
2148+
#define LEDC_EVT_TIMER1_CMP_EN (BIT(21))
2149+
#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S)
2150+
#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U
2151+
#define LEDC_EVT_TIMER1_CMP_EN_S 21
2152+
/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0;
21532153
* Ledc timer2 compare event enable register, write 1 to enable this event.
21542154
*/
2155-
#define LEDC_EVT_TIME2_CMP_EN (BIT(22))
2156-
#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S)
2157-
#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U
2158-
#define LEDC_EVT_TIME2_CMP_EN_S 22
2159-
/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0;
2155+
#define LEDC_EVT_TIMER2_CMP_EN (BIT(22))
2156+
#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S)
2157+
#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U
2158+
#define LEDC_EVT_TIMER2_CMP_EN_S 22
2159+
/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0;
21602160
* Ledc timer3 compare event enable register, write 1 to enable this event.
21612161
*/
2162-
#define LEDC_EVT_TIME3_CMP_EN (BIT(23))
2163-
#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S)
2164-
#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U
2165-
#define LEDC_EVT_TIME3_CMP_EN_S 23
2162+
#define LEDC_EVT_TIMER3_CMP_EN (BIT(23))
2163+
#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S)
2164+
#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U
2165+
#define LEDC_EVT_TIMER3_CMP_EN_S 23
21662166
/** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0;
21672167
* Ledc ch0 duty scale update task enable register, write 1 to enable this task.
21682168
*/

‎components/soc/esp32h21/register/soc/ledc_struct.h‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**
2-
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
@@ -144,22 +144,22 @@ typedef union {
144144
* Ledc timer3 overflow event enable register, write 1 to enable this event.
145145
*/
146146
uint32_t evt_time_ovf_timer3_en:1;
147-
/** evt_time0_cmp_en : R/W; bitpos: [20]; default: 0;
147+
/** evt_timer0_cmp_en : R/W; bitpos: [20]; default: 0;
148148
* Ledc timer0 compare event enable register, write 1 to enable this event.
149149
*/
150-
uint32_t evt_time0_cmp_en:1;
151-
/** evt_time1_cmp_en : R/W; bitpos: [21]; default: 0;
150+
uint32_t evt_timer0_cmp_en:1;
151+
/** evt_timer1_cmp_en : R/W; bitpos: [21]; default: 0;
152152
* Ledc timer1 compare event enable register, write 1 to enable this event.
153153
*/
154-
uint32_t evt_time1_cmp_en:1;
155-
/** evt_time2_cmp_en : R/W; bitpos: [22]; default: 0;
154+
uint32_t evt_timer1_cmp_en:1;
155+
/** evt_timer2_cmp_en : R/W; bitpos: [22]; default: 0;
156156
* Ledc timer2 compare event enable register, write 1 to enable this event.
157157
*/
158-
uint32_t evt_time2_cmp_en:1;
159-
/** evt_time3_cmp_en : R/W; bitpos: [23]; default: 0;
158+
uint32_t evt_timer2_cmp_en:1;
159+
/** evt_timer3_cmp_en : R/W; bitpos: [23]; default: 0;
160160
* Ledc timer3 compare event enable register, write 1 to enable this event.
161161
*/
162-
uint32_t evt_time3_cmp_en:1;
162+
uint32_t evt_timer3_cmp_en:1;
163163
/** task_duty_scale_update_ch0_en : R/W; bitpos: [24]; default: 0;
164164
* Ledc ch0 duty scale update task enable register, write 1 to enable this task.
165165
*/

‎components/soc/esp32h4/register/soc/ledc_reg.h‎

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -2219,42 +2219,42 @@ extern "C" {
22192219
#define LEDC_EVT_TIME_OVF_TIMER3_EN_M (LEDC_EVT_TIME_OVF_TIMER3_EN_V << LEDC_EVT_TIME_OVF_TIMER3_EN_S)
22202220
#define LEDC_EVT_TIME_OVF_TIMER3_EN_V 0x00000001U
22212221
#define LEDC_EVT_TIME_OVF_TIMER3_EN_S 19
2222-
/** LEDC_EVT_TIME0_CMP_EN : R/W; bitpos: [20]; default: 0;
2222+
/** LEDC_EVT_TIMER0_CMP_EN : R/W; bitpos: [20]; default: 0;
22232223
* Configures whether or not to enable the LEDC_EVT_TIMER0_CMP event.
22242224
* 0: Disable
22252225
* 1: Enable
22262226
*/
2227-
#define LEDC_EVT_TIME0_CMP_EN (BIT(20))
2228-
#define LEDC_EVT_TIME0_CMP_EN_M (LEDC_EVT_TIME0_CMP_EN_V << LEDC_EVT_TIME0_CMP_EN_S)
2229-
#define LEDC_EVT_TIME0_CMP_EN_V 0x00000001U
2230-
#define LEDC_EVT_TIME0_CMP_EN_S 20
2231-
/** LEDC_EVT_TIME1_CMP_EN : R/W; bitpos: [21]; default: 0;
2227+
#define LEDC_EVT_TIMER0_CMP_EN (BIT(20))
2228+
#define LEDC_EVT_TIMER0_CMP_EN_M (LEDC_EVT_TIMER0_CMP_EN_V << LEDC_EVT_TIMER0_CMP_EN_S)
2229+
#define LEDC_EVT_TIMER0_CMP_EN_V 0x00000001U
2230+
#define LEDC_EVT_TIMER0_CMP_EN_S 20
2231+
/** LEDC_EVT_TIMER1_CMP_EN : R/W; bitpos: [21]; default: 0;
22322232
* Configures whether or not to enable the LEDC_EVT_TIMER1_CMP event.
22332233
* 0: Disable
22342234
* 1: Enable
22352235
*/
2236-
#define LEDC_EVT_TIME1_CMP_EN (BIT(21))
2237-
#define LEDC_EVT_TIME1_CMP_EN_M (LEDC_EVT_TIME1_CMP_EN_V << LEDC_EVT_TIME1_CMP_EN_S)
2238-
#define LEDC_EVT_TIME1_CMP_EN_V 0x00000001U
2239-
#define LEDC_EVT_TIME1_CMP_EN_S 21
2240-
/** LEDC_EVT_TIME2_CMP_EN : R/W; bitpos: [22]; default: 0;
2236+
#define LEDC_EVT_TIMER1_CMP_EN (BIT(21))
2237+
#define LEDC_EVT_TIMER1_CMP_EN_M (LEDC_EVT_TIMER1_CMP_EN_V << LEDC_EVT_TIMER1_CMP_EN_S)
2238+
#define LEDC_EVT_TIMER1_CMP_EN_V 0x00000001U
2239+
#define LEDC_EVT_TIMER1_CMP_EN_S 21
2240+
/** LEDC_EVT_TIMER2_CMP_EN : R/W; bitpos: [22]; default: 0;
22412241
* Configures whether or not to enable the LEDC_EVT_TIMER2_CMP event.
22422242
* 0: Disable
22432243
* 1: Enable
22442244
*/
2245-
#define LEDC_EVT_TIME2_CMP_EN (BIT(22))
2246-
#define LEDC_EVT_TIME2_CMP_EN_M (LEDC_EVT_TIME2_CMP_EN_V << LEDC_EVT_TIME2_CMP_EN_S)
2247-
#define LEDC_EVT_TIME2_CMP_EN_V 0x00000001U
2248-
#define LEDC_EVT_TIME2_CMP_EN_S 22
2249-
/** LEDC_EVT_TIME3_CMP_EN : R/W; bitpos: [23]; default: 0;
2245+
#define LEDC_EVT_TIMER2_CMP_EN (BIT(22))
2246+
#define LEDC_EVT_TIMER2_CMP_EN_M (LEDC_EVT_TIMER2_CMP_EN_V << LEDC_EVT_TIMER2_CMP_EN_S)
2247+
#define LEDC_EVT_TIMER2_CMP_EN_V 0x00000001U
2248+
#define LEDC_EVT_TIMER2_CMP_EN_S 22
2249+
/** LEDC_EVT_TIMER3_CMP_EN : R/W; bitpos: [23]; default: 0;
22502250
* Configures whether or not to enable the LEDC_EVT_TIMER3_CMP event.
22512251
* 0: Disable
22522252
* 1: Enable
22532253
*/
2254-
#define LEDC_EVT_TIME3_CMP_EN (BIT(23))
2255-
#define LEDC_EVT_TIME3_CMP_EN_M (LEDC_EVT_TIME3_CMP_EN_V << LEDC_EVT_TIME3_CMP_EN_S)
2256-
#define LEDC_EVT_TIME3_CMP_EN_V 0x00000001U
2257-
#define LEDC_EVT_TIME3_CMP_EN_S 23
2254+
#define LEDC_EVT_TIMER3_CMP_EN (BIT(23))
2255+
#define LEDC_EVT_TIMER3_CMP_EN_M (LEDC_EVT_TIMER3_CMP_EN_V << LEDC_EVT_TIMER3_CMP_EN_S)
2256+
#define LEDC_EVT_TIMER3_CMP_EN_V 0x00000001U
2257+
#define LEDC_EVT_TIMER3_CMP_EN_S 23
22582258
/** LEDC_TASK_DUTY_SCALE_UPDATE_CH0_EN : R/W; bitpos: [24]; default: 0;
22592259
* Configures whether or not to enable the LEDC_TASK_DUTY_SCALE_UPDATE_CH0 task.
22602260
* 0: Disable

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