11/*
2- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
2+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
33 *
44 * SPDX-License-Identifier: Apache-2.0
55 */
@@ -41,12 +41,16 @@ static const char *TAG_CH[2][10] = {{"ADC1_CH2", "ADC1_CH3"}, {"ADC2_CH0"}};
4141//ESP32C3 ADC2 oneshot mode is not supported anymore
4242#define ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2 ((SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3)
4343
44- TEST_CASE ("ADC oneshot high/low test" , "[adc_oneshot]" )
45- {
46- static int adc_raw [2 ][10 ];
44+ static int adc_raw [2 ][10 ];
45+ static adc_oneshot_unit_handle_t adc1_handle ;
46+ #if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
47+ static adc_oneshot_unit_handle_t adc2_handle ;
48+ #endif
4749
50+ static void adc_oneshot_init_test (void )
51+ {
4852 //-------------ADC1 Init---------------//
49- adc_oneshot_unit_handle_t adc1_handle ;
53+
5054 adc_oneshot_unit_init_cfg_t init_config1 = {
5155 .unit_id = ADC_UNIT_1 ,
5256 .ulp_mode = ADC_ULP_MODE_DISABLE ,
@@ -55,7 +59,6 @@ TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]")
5559
5660#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
5761 //-------------ADC2 Init---------------//
58- adc_oneshot_unit_handle_t adc2_handle ;
5962 adc_oneshot_unit_init_cfg_t init_config2 = {
6063 .unit_id = ADC_UNIT_2 ,
6164 .ulp_mode = ADC_ULP_MODE_DISABLE ,
@@ -77,7 +80,10 @@ TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]")
7780 //-------------ADC2 TEST Channel 0 Config---------------//
7881 TEST_ESP_OK (adc_oneshot_config_channel (adc2_handle , ADC2_TEST_CHAN0 , & config ));
7982#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
83+ }
8084
85+ static void adc_oneshot_read_test (void )
86+ {
8187 test_adc_set_io_level (ADC_UNIT_1 , ADC1_TEST_CHAN0 , 0 );
8288 TEST_ESP_OK (adc_oneshot_read (adc1_handle , ADC1_TEST_CHAN0 , & adc_raw [0 ][0 ]));
8389 ESP_LOGI (TAG_CH [0 ][0 ], "low raw data: %d" , adc_raw [0 ][0 ]);
@@ -111,13 +117,30 @@ TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]")
111117 ESP_LOGI (TAG_CH [1 ][0 ], "high raw data: %d" , adc_raw [1 ][0 ]);
112118 TEST_ASSERT_INT_WITHIN (ADC_TEST_HIGH_THRESH , ADC_TEST_HIGH_VAL , adc_raw [1 ][0 ]);
113119#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
120+ }
114121
122+ static void adc_oneshot_deinit_test (void )
123+ {
115124 TEST_ESP_OK (adc_oneshot_del_unit (adc1_handle ));
116125#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
117126 TEST_ESP_OK (adc_oneshot_del_unit (adc2_handle ));
118127#endif //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
119128}
120129
130+ TEST_CASE ("ADC oneshot basic test" , "[adc_oneshot]" )
131+ {
132+ adc_oneshot_init_test ();
133+ adc_oneshot_read_test ();
134+ printf ("ADC onshot re-read: \n" );
135+ adc_oneshot_read_test ();
136+ adc_oneshot_deinit_test ();
137+
138+ printf ("ADC onshot re-start: \n" );
139+ adc_oneshot_init_test ();
140+ adc_oneshot_read_test ();
141+ adc_oneshot_deinit_test ();
142+ }
143+
121144TEST_CASE ("ADC oneshot stress test that get zero even if convent done" , "[adc_oneshot]" )
122145{
123146 //There is a hardware limitation. After ADC get DONE signal, it still need a delay to synchronize ADC raw data or it may get zero even if getting DONE signal.
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