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esp-wzhesp-wzh
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fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration
1 parent 0b8f661 commit b3911c7

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10 files changed

+14
-38
lines changed

10 files changed

+14
-38
lines changed

‎components/esp_system/port/soc/esp32/clk.c‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -92,11 +92,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
9292
}
9393
rtc_clk_slow_src_set(rtc_slow_clk_src);
9494
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
95-
if (slow_clk == SLOW_CLK_32K_XTAL) {
96-
rtc_clk_32k_enable(false);
97-
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
98-
rtc_clk_32k_disable_external();
99-
}
95+
rtc_clk_32k_enable(false);
96+
rtc_clk_32k_disable_external();
10097
}
10198
if (SLOW_CLK_CAL_CYCLES > 0) {
10299
/* TODO: 32k XTAL oscillator has some frequency drift at startup.

‎components/esp_system/port/soc/esp32c3/clk.c‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -177,11 +177,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
177177
}
178178
rtc_clk_slow_src_set(rtc_slow_clk_src);
179179
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
180-
if (slow_clk == SLOW_CLK_32K_XTAL) {
181-
rtc_clk_32k_enable(false);
182-
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
183-
rtc_clk_32k_disable_external();
184-
}
180+
rtc_clk_32k_enable(false);
181+
rtc_clk_32k_disable_external();
185182
}
186183
if (SLOW_CLK_CAL_CYCLES > 0) {
187184
/* TODO: 32k XTAL oscillator has some frequency drift at startup.

‎components/esp_system/port/soc/esp32c5/clk.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -173,10 +173,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
173173
rtc_clk_slow_src_set(rtc_slow_clk_src);
174174
// Disable unused clock sources after clock source switching is complete.
175175
// Regardless of the clock source selection, the internal 136K clock source will always keep on.
176-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
176+
if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
177177
rtc_clk_32k_enable(false);
178-
}
179-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
180178
rtc_clk_32k_disable_external();
181179
}
182180
if (SLOW_CLK_CAL_CYCLES > 0) {

‎components/esp_system/port/soc/esp32c6/clk.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -187,10 +187,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
187187
rtc_clk_slow_src_set(rtc_slow_clk_src);
188188
// Disable unused clock sources after clock source switching is complete.
189189
// Regardless of the clock source selection, the internal 136K clock source will always keep on.
190-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
190+
if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
191191
rtc_clk_32k_enable(false);
192-
}
193-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
194192
rtc_clk_32k_disable_external();
195193
}
196194
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {

‎components/esp_system/port/soc/esp32c61/clk.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -150,10 +150,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
150150
rtc_clk_slow_src_set(rtc_slow_clk_src);
151151
// Disable unused clock sources after clock source switching is complete.
152152
// Regardless of the clock source selection, the internal 136K clock source will always keep on.
153-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
153+
if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
154154
rtc_clk_32k_enable(false);
155-
}
156-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
157155
rtc_clk_32k_disable_external();
158156
}
159157
if (SLOW_CLK_CAL_CYCLES > 0) {

‎components/esp_system/port/soc/esp32h2/clk.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -185,10 +185,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
185185
rtc_clk_slow_src_set(rtc_slow_clk_src);
186186
// Disable unused clock sources after clock source switching is complete.
187187
// Regardless of the clock source selection, the internal 136K clock source will always keep on.
188-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
188+
if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
189189
rtc_clk_32k_enable(false);
190-
}
191-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
192190
rtc_clk_32k_disable_external();
193191
}
194192
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {

‎components/esp_system/port/soc/esp32h21/clk.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -165,10 +165,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
165165
rtc_clk_slow_src_set(rtc_slow_clk_src);
166166
// Disable unused clock sources after clock source switching is complete.
167167
// Regardless of the clock source selection, the internal 136K clock source will always keep on.
168-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
168+
if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
169169
rtc_clk_32k_enable(false);
170-
}
171-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
172170
rtc_clk_32k_disable_external();
173171
}
174172
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {

‎components/esp_system/port/soc/esp32h4/clk.c‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -145,10 +145,8 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
145145
rtc_clk_rc32k_enable(true);
146146
}
147147
rtc_clk_slow_src_set(rtc_slow_clk_src);
148-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
148+
if ((rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) && (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW)) {
149149
rtc_clk_32k_enable(false);
150-
}
151-
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) {
152150
rtc_clk_32k_disable_external();
153151
}
154152
if (SLOW_CLK_CAL_CYCLES > 0) {

‎components/esp_system/port/soc/esp32s2/clk.c‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -180,11 +180,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
180180
}
181181
rtc_clk_slow_src_set(rtc_slow_clk_src);
182182
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
183-
if (slow_clk == SLOW_CLK_32K_XTAL) {
184-
rtc_clk_32k_enable(false);
185-
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
186-
rtc_clk_32k_disable_external();
187-
}
183+
rtc_clk_32k_enable(false);
184+
rtc_clk_32k_disable_external();
188185
}
189186
if (SLOW_CLK_CAL_CYCLES > 0) {
190187
/* TODO: 32k XTAL oscillator has some frequency drift at startup.

‎components/esp_system/port/soc/esp32s3/clk.c‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -178,11 +178,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
178178
}
179179
rtc_clk_slow_src_set(rtc_slow_clk_src);
180180
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
181-
if (slow_clk == SLOW_CLK_32K_XTAL) {
182-
rtc_clk_32k_enable(false);
183-
} else if (slow_clk == SLOW_CLK_32K_EXT_OSC) {
184-
rtc_clk_32k_disable_external();
185-
}
181+
rtc_clk_32k_enable(false);
182+
rtc_clk_32k_disable_external();
186183
}
187184
if (SLOW_CLK_CAL_CYCLES > 0) {
188185
/* TODO: 32k XTAL oscillator has some frequency drift at startup.

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