Skip to content

Commit bd48184

Browse files
jack0cjack0c
committed
Merge branch 'bugfix/fix_esp32c5_external_coex_enable_fail_issue' into 'master'
Bugfix/fix esp32c5 and esp32c6 external coex enable fail issue Closes WIFI-6611, IDF-9141, and IDF-10531 See merge request espressif/esp-idf!33689
2 parents 559e554 + 63bb1c6 commit bd48184

File tree

3 files changed

+34
-17
lines changed

3 files changed

+34
-17
lines changed

‎components/esp_coex/src/coexist.c‎

Lines changed: 24 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1,21 +1,24 @@
11
/*
2-
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
2+
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

77
#include "esp_coexist.h"
88
#include "private/esp_coexist_internal.h"
9+
#include "soc/soc_caps.h"
910

1011
#if CONFIG_EXTERNAL_COEX_ENABLE
1112
#include "esp_log.h"
1213
#include "driver/gpio.h"
1314
#include "esp_rom_gpio.h"
1415
#include "hal/gpio_hal.h"
15-
#include "hal/gpio_types.h"
16-
#include "soc/gpio_periph.h"
17-
#include "soc/gpio_struct.h"
1816
#include "esp_attr.h"
17+
#include "esp_private/gpio.h"
18+
#endif
19+
20+
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
21+
#include "esp_private/esp_modem_clock.h"
1922
#endif
2023

2124
#if SOC_EXTERNAL_COEX_ADVANCE
@@ -163,9 +166,6 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
163166
return ESP_ERR_INVALID_ARG;
164167
}
165168
esp_coex_external_set_wire_type(wire_type);
166-
#if SOC_EXTERNAL_COEX_ADVANCE
167-
esp_coex_external_params(g_external_coex_params, 0, 0);
168-
#endif
169169

170170
if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) {
171171
switch (wire_type)
@@ -174,7 +174,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
174174
case EXTERN_COEX_WIRE_4:
175175
{
176176
esp_coex_external_set_txline(true);
177-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.tx_line], PIN_FUNC_GPIO);
177+
gpio_func_sel(gpio_pin.tx_line, PIN_FUNC_GPIO);
178178
gpio_set_direction(gpio_pin.tx_line, GPIO_MODE_OUTPUT);
179179
REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.tx_line));
180180
esp_rom_gpio_connect_out_signal(gpio_pin.tx_line, EXTERNAL_COEX_SIGNAL_O1_TXLINE_IDX, false, false);
@@ -183,7 +183,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
183183
#endif
184184
case EXTERN_COEX_WIRE_3:
185185
{
186-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.priority], PIN_FUNC_GPIO);
186+
gpio_func_sel(gpio_pin.priority, PIN_FUNC_GPIO);
187187
gpio_set_direction(gpio_pin.priority, GPIO_MODE_INPUT);
188188
esp_rom_gpio_connect_in_signal(gpio_pin.priority, EXTERNAL_COEX_SIGNAL_I1_IDX, false);
189189
REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.priority), GPIO_PIN1_SYNC1_BYPASS, 2);
@@ -192,15 +192,15 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
192192
__attribute__((fallthrough));
193193
case EXTERN_COEX_WIRE_2:
194194
{
195-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.grant], PIN_FUNC_GPIO);
195+
gpio_func_sel(gpio_pin.grant, PIN_FUNC_GPIO);
196196
gpio_set_direction(gpio_pin.grant, GPIO_MODE_OUTPUT);
197197
REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.grant));
198198
esp_rom_gpio_connect_out_signal(gpio_pin.grant, EXTERNAL_COEX_SIGNAL_O0_IDX, false, false);
199199
}
200200
__attribute__((fallthrough));
201201
case EXTERN_COEX_WIRE_1:
202202
{
203-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.request], PIN_FUNC_GPIO);
203+
gpio_func_sel(gpio_pin.request, PIN_FUNC_GPIO);
204204
gpio_set_direction(gpio_pin.request, GPIO_MODE_INPUT);
205205
esp_rom_gpio_connect_in_signal(gpio_pin.request, EXTERNAL_COEX_SIGNAL_I0_IDX, false);
206206
REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.request), GPIO_PIN1_SYNC1_BYPASS, 2);
@@ -218,7 +218,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
218218
{
219219
case EXTERN_COEX_WIRE_4:
220220
{
221-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.tx_line], PIN_FUNC_GPIO);
221+
gpio_func_sel(gpio_pin.tx_line, PIN_FUNC_GPIO);
222222
gpio_set_direction(gpio_pin.tx_line, GPIO_MODE_INPUT);
223223
esp_rom_gpio_connect_in_signal(gpio_pin.tx_line, EXTERNAL_COEX_SIGNAL_I1_IDX, false);
224224
REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.tx_line), GPIO_PIN1_SYNC1_BYPASS, 2);
@@ -227,15 +227,15 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
227227
__attribute__((fallthrough));
228228
case EXTERN_COEX_WIRE_3:
229229
{
230-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.priority], PIN_FUNC_GPIO);
230+
gpio_func_sel(gpio_pin.priority, PIN_FUNC_GPIO);
231231
gpio_set_direction(gpio_pin.priority, GPIO_MODE_OUTPUT);
232232
REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.priority));
233233
esp_rom_gpio_connect_out_signal(gpio_pin.priority, EXTERNAL_COEX_SIGNAL_O1_IDX, false, false);
234234
}
235235
__attribute__((fallthrough));
236236
case EXTERN_COEX_WIRE_2:
237237
{
238-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.grant], PIN_FUNC_GPIO);
238+
gpio_func_sel(gpio_pin.grant, PIN_FUNC_GPIO);
239239
gpio_set_direction(gpio_pin.grant, GPIO_MODE_INPUT);
240240
esp_rom_gpio_connect_in_signal(gpio_pin.grant, EXTERNAL_COEX_SIGNAL_I0_IDX, false);
241241
REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.grant), GPIO_PIN1_SYNC1_BYPASS, 2);
@@ -244,7 +244,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
244244
__attribute__((fallthrough));
245245
case EXTERN_COEX_WIRE_1:
246246
{
247-
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.request], PIN_FUNC_GPIO);
247+
gpio_func_sel(gpio_pin.request, PIN_FUNC_GPIO);
248248
gpio_set_direction(gpio_pin.request, GPIO_MODE_OUTPUT);
249249
REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.request));
250250
esp_rom_gpio_connect_out_signal(gpio_pin.request, EXTERNAL_COEX_SIGNAL_O0_IDX, false, false);
@@ -259,7 +259,16 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex
259259
return ESP_ERR_INVALID_ARG;
260260
#endif /* SOC_EXTERNAL_COEX_ADVANCE */
261261
}
262+
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
263+
modem_clock_module_enable(PERIPH_COEX_MODULE);
264+
#endif
265+
#if SOC_EXTERNAL_COEX_ADVANCE
266+
esp_coex_external_params(g_external_coex_params, 0, 0);
267+
#endif
262268
esp_err_t ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH);
269+
#if SOC_MODEM_CLOCK_IS_INDEPENDENT
270+
modem_clock_module_disable(PERIPH_COEX_MODULE);
271+
#endif
263272
if (ESP_OK != ret) {
264273
return ESP_FAIL;
265274
}

‎components/soc/esp32c5/include/soc/Kconfig.soc_caps.in‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1235,6 +1235,14 @@ config SOC_COEX_HW_PTI
12351235
bool
12361236
default y
12371237

1238+
config SOC_EXTERNAL_COEX_ADVANCE
1239+
bool
1240+
default y
1241+
1242+
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
1243+
bool
1244+
default n
1245+
12381246
config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
12391247
int
12401248
default 12

‎components/soc/esp32c5/include/soc/soc_caps.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -529,8 +529,8 @@
529529
#define SOC_COEX_HW_PTI (1)
530530

531531
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
532-
// #define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
533-
// #define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
532+
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE EXTERNAL COEXISTENCE CAPS */
533+
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
534534

535535
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
536536
// #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

0 commit comments

Comments
 (0)