fix(adc): fix adc do not enable/disable regi2c registers

Author: Bruce297

components/bootloader_support/src/bootloader_random_esp32c5.c

@@ -18,8 +18,7 @@ void bootloader_random_enable(void)
     adc_ll_digi_controller_clk_div(0, 0, 0);
 
     // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
-    regi2c_ctrl_ll_reset(false);
-    regi2c_ctrl_ll_i2c_periph_enable();
+    regi2c_ctrl_ll_i2c_sar_periph_enable();
     // enable analog i2c master clock for RNG runtime
     ANALOG_CLOCK_ENABLE();
 

components/bootloader_support/src/bootloader_random_esp32c6.c

@@ -18,8 +18,7 @@ void bootloader_random_enable(void)
     adc_ll_digi_controller_clk_div(0, 0, 0);
 
     // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
-    regi2c_ctrl_ll_reset(false);
-    regi2c_ctrl_ll_i2c_periph_enable();
+    regi2c_ctrl_ll_i2c_sar_periph_enable();
     // enable analog i2c master clock for RNG runtime
     ANALOG_CLOCK_ENABLE();
 

components/bootloader_support/src/bootloader_random_esp32c61.c

@@ -18,8 +18,7 @@ void bootloader_random_enable(void)
     adc_ll_digi_controller_clk_div(0, 0, 0);
 
     // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
-    regi2c_ctrl_ll_reset(false);
-    regi2c_ctrl_ll_i2c_periph_enable();
+    regi2c_ctrl_ll_i2c_sar_periph_enable();
     // enable analog i2c master clock for RNG runtime
     ANALOG_CLOCK_ENABLE();
 

components/bootloader_support/src/bootloader_random_esp32h2.c

@@ -18,7 +18,7 @@ void bootloader_random_enable(void)
     adc_ll_digi_controller_clk_div(0, 0, 0);
 
     // some ADC sensor registers are in power group PERIF_I2C and need to be enabled via PMU
-    regi2c_ctrl_ll_i2c_periph_enable();
+    regi2c_ctrl_ll_i2c_sar_periph_enable();
     // enable analog i2c master clock for RNG runtime
     ANALOG_CLOCK_ENABLE();
 

components/driver/deprecated/adc_legacy.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -459,10 +459,6 @@ esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten)
     adc_lock_release(ADC_UNIT_2);
 #endif
 
-#if SOC_ADC_CALIBRATION_V1_SUPPORTED
-    adc_hal_calibration_init(ADC_UNIT_2);
-#endif
-
     return ESP_OK;
 }
 
@@ -539,11 +535,6 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
     bitwidth = ADC_BITWIDTH_12;
 #endif
 
-#if SOC_ADC_CALIBRATION_V1_SUPPORTED
-    adc_atten_t atten = adc_ll_get_atten(ADC_UNIT_2, channel);
-    adc_set_hw_calibration_code(ADC_UNIT_2, atten);
-#endif  //SOC_ADC_CALIBRATION_V1_SUPPORTED
-
 #if CONFIG_IDF_TARGET_ESP32
     /** For ESP32S2 and S3, the right to use ADC2 is controlled by the arbiter, and there is no need to set a lock.*/
     if (adc_lock_try_acquire(ADC_UNIT_2) != ESP_OK) {
@@ -553,6 +544,12 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
 #endif
     sar_periph_ctrl_adc_oneshot_power_acquire();         //in critical section with whole rtc module
 
+#if SOC_ADC_CALIBRATION_V1_SUPPORTED
+    adc_hal_calibration_init(ADC_UNIT_2);
+    adc_atten_t atten = adc_ll_get_atten(ADC_UNIT_2, channel);
+    adc_set_hw_calibration_code(ADC_UNIT_2, atten);
+#endif  //SOC_ADC_CALIBRATION_V1_SUPPORTED
+
     //avoid collision with other tasks
     adc2_init();   // in critical section with whole rtc module. because the PWDET use the same registers, place it here.
     SARADC2_ENTER();

components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c

@@ -139,23 +139,23 @@ TEST_CASE("Legacy ADC oneshot high/low test", "[legacy_adc_oneshot]")
 
     test_adc_set_io_level(ADC_UNIT_1, (adc1_channel_t)ADC1_TEST_CHAN0, 0);
     adc_raw = adc1_get_raw(ADC1_TEST_CHAN0);
-    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_1, ADC1_TEST_CHAN0, adc_raw);
+    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_1 + 1, ADC1_TEST_CHAN0, adc_raw);
     TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw);
 
     test_adc_set_io_level(ADC_UNIT_1, (adc1_channel_t)ADC1_TEST_CHAN0, 1);
     adc_raw = adc1_get_raw(ADC1_TEST_CHAN0);
-    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_1, ADC1_TEST_CHAN0, adc_raw);
+    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_1 + 1, ADC1_TEST_CHAN0, adc_raw);
     TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw);
 
 #if ADC_TEST_ADC2
     test_adc_set_io_level(ADC_UNIT_2, (adc2_channel_t)ADC2_TEST_CHAN0, 0);
     TEST_ESP_OK(adc2_get_raw(ADC2_TEST_CHAN0, ADC_WIDTH_BIT_DEFAULT, &adc_raw));
-    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_2, ADC2_TEST_CHAN0, adc_raw);
+    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_2 + 1, ADC2_TEST_CHAN0, adc_raw);
     TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw);
 
     test_adc_set_io_level(ADC_UNIT_2, (adc2_channel_t)ADC2_TEST_CHAN0, 1);
     TEST_ESP_OK(adc2_get_raw(ADC2_TEST_CHAN0, ADC_WIDTH_BIT_DEFAULT, &adc_raw));
-    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_2, ADC2_TEST_CHAN0, adc_raw);
+    ESP_LOGI(TAG, "ADC%d Channel %d raw: %d", ADC_UNIT_2 + 1, ADC2_TEST_CHAN0, adc_raw);
     TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw);
 #endif
 }

components/esp_adc/adc_continuous.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2016-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2016-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -258,10 +258,6 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
     ESP_RETURN_ON_FALSE(handle->fsm == ADC_FSM_INIT, ESP_ERR_INVALID_STATE, ADC_TAG, "ADC continuous mode isn't in the init state, it's started already");
 
     ANALOG_CLOCK_ENABLE();
-#if SOC_ADC_CALIBRATION_V1_SUPPORTED
-    adc_hal_calibration_init(ADC_UNIT_1);
-    adc_hal_calibration_init(ADC_UNIT_2);
-#endif  //#if SOC_ADC_CALIBRATION_V1_SUPPORTED
 
     //reset ADC digital part to reset ADC sampling EOF counter
     ADC_BUS_CLK_ATOMIC() {
@@ -284,9 +280,11 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
 
 #if SOC_ADC_CALIBRATION_V1_SUPPORTED
     if (handle->use_adc1) {
+        adc_hal_calibration_init(ADC_UNIT_1);
         adc_set_hw_calibration_code(ADC_UNIT_1, handle->adc1_atten);
     }
     if (handle->use_adc2) {
+        adc_hal_calibration_init(ADC_UNIT_2);
         adc_set_hw_calibration_code(ADC_UNIT_2, handle->adc2_atten);
     }
 #endif  //#if SOC_ADC_CALIBRATION_V1_SUPPORTED

components/esp_hw_support/port/esp32c2/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,7 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
 
@@ -83,13 +84,14 @@ void sar_periph_ctrl_pwdet_power_release(void)
 /*------------------------------------------------------------------------------
 * ADC Power
 *----------------------------------------------------------------------------*/
-static int s_saradc_power_on_cnt;
+static int s_sar_power_on_cnt;
 
 static void s_sar_adc_power_acquire(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
-    s_saradc_power_on_cnt++;
-    if (s_saradc_power_on_cnt == 1) {
+    regi2c_saradc_enable();
+    s_sar_power_on_cnt++;
+    if (s_sar_power_on_cnt == 1) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_SW_ON);
     }
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
@@ -98,14 +100,15 @@ static void s_sar_adc_power_acquire(void)
 static void s_sar_adc_power_release(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
-    s_saradc_power_on_cnt--;
-    if (s_saradc_power_on_cnt < 0) {
+    s_sar_power_on_cnt--;
+    if (s_sar_power_on_cnt < 0) {
         portEXIT_CRITICAL(&rtc_spinlock);
-        ESP_LOGE(TAG, "%s called, but s_saradc_power_on_cnt == 0", __func__);
+        ESP_LOGE(TAG, "%s called, but s_sar_power_on_cnt == 0", __func__);
         abort();
-    } else if (s_saradc_power_on_cnt == 0) {
+    } else if (s_sar_power_on_cnt == 0) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_BY_FSM);
     }
+    regi2c_saradc_disable();
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
 }
 

components/esp_hw_support/port/esp32c3/sar_periph_ctrl.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,6 +19,7 @@
 #include "esp_log.h"
 #include "freertos/FreeRTOS.h"
 #include "esp_private/sar_periph_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 #include "hal/sar_ctrl_ll.h"
 #include "hal/adc_ll.h"
 
@@ -83,13 +84,14 @@ void sar_periph_ctrl_pwdet_power_release(void)
 /*------------------------------------------------------------------------------
 * ADC Power
 *----------------------------------------------------------------------------*/
-static int s_saradc_power_on_cnt;
+static int s_sar_power_on_cnt;
 
 static void s_sar_adc_power_acquire(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
-    s_saradc_power_on_cnt++;
-    if (s_saradc_power_on_cnt == 1) {
+    regi2c_saradc_enable();
+    s_sar_power_on_cnt++;
+    if (s_sar_power_on_cnt == 1) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_SW_ON);
     }
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
@@ -98,14 +100,15 @@ static void s_sar_adc_power_acquire(void)
 static void s_sar_adc_power_release(void)
 {
     portENTER_CRITICAL_SAFE(&rtc_spinlock);
-    s_saradc_power_on_cnt--;
-    if (s_saradc_power_on_cnt < 0) {
+    s_sar_power_on_cnt--;
+    if (s_sar_power_on_cnt < 0) {
         portEXIT_CRITICAL(&rtc_spinlock);
-        ESP_LOGE(TAG, "%s called, but s_saradc_power_on_cnt == 0", __func__);
+        ESP_LOGE(TAG, "%s called, but s_sar_power_on_cnt == 0", __func__);
         abort();
-    } else if (s_saradc_power_on_cnt == 0) {
+    } else if (s_sar_power_on_cnt == 0) {
         adc_ll_digi_set_power_manage(ADC_LL_POWER_BY_FSM);
     }
+    regi2c_saradc_disable();
     portEXIT_CRITICAL_SAFE(&rtc_spinlock);
 }
 

components/esp_hw_support/port/esp32c5/pmu_init.c

@@ -208,10 +208,6 @@ static void pmu_lp_system_init_default(pmu_context_t *ctx)
 
 void pmu_init(void)
 {
-    /* Peripheral reg i2c power up */
-    regi2c_ctrl_ll_reset(false);
-    regi2c_ctrl_ll_i2c_periph_enable();
-
     pmu_hp_system_init_default(PMU_instance());
     pmu_lp_system_init_default(PMU_instance());