feat(driver_spi): c61 eco3 support master rx sample phase config

wanckl · wanckl · commit c6e18383b736 · 2025-06-30T19:32:11.000+08:00
diff --git a/components/hal/esp32c61/include/hal/spi_ll.h b/components/hal/esp32c61/include/hal/spi_ll.h
@@ -719,15 +719,15 @@ static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active)
  */
 static inline void spi_ll_master_set_rx_timing_mode(spi_dev_t *hw, spi_sampling_point_t sample_point)
 {
-    //This is not supported
+    hw->clock.clk_edge_sel = (sample_point == SPI_SAMPLING_POINT_PHASE_1);
 }
 
 /**
  * Get if standard clock mode is supported.
  */
 static inline bool spi_ll_master_is_rx_std_sample_supported(void)
 {
-    return false;
+    return true;
 }
 
 /**

Original file line number	Diff line number	Diff line change
`@@ -719,15 +719,15 @@ static inline void spi_ll_master_keep_cs(spi_dev_t *hw, int keep_active)`
`719`	`719`	`*/`
`720`	`720`	`static inline void spi_ll_master_set_rx_timing_mode(spi_dev_t *hw, spi_sampling_point_t sample_point)`
`721`	`721`	`{`
`722`		`- //This is not supported`
	`722`	`+ hw->clock.clk_edge_sel = (sample_point == SPI_SAMPLING_POINT_PHASE_1);`
`723`	`723`	`}`
`724`	`724`
`725`	`725`	`/**`
`726`	`726`	`* Get if standard clock mode is supported.`
`727`	`727`	`*/`
`728`	`728`	`static inline bool spi_ll_master_is_rx_std_sample_supported(void)`
`729`	`729`	`{`
`730`		`- return false;`
	`730`	`+ return true;`
`731`	`731`	`}`
`732`	`732`
`733`	`733`	`/**`